cosmetic: rockchip: rk3288: pinctrl: fix config symbol naming
authorHeiko Stübner <heiko@sntech.de>
Fri, 15 Jul 2016 22:17:13 +0000 (00:17 +0200)
committerSimon Glass <sjg@chromium.org>
Tue, 26 Jul 2016 02:44:20 +0000 (20:44 -0600)
The rk3288 pinctrl is very specific to this soc, so should
not hog the generic rockchip naming.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
configs/chromebook_jerry_defconfig
configs/firefly-rk3288_defconfig
configs/rock2_defconfig
configs/sandbox_defconfig
configs/sandbox_noblk_defconfig
drivers/pinctrl/Kconfig
drivers/pinctrl/rockchip/Makefile

index d5bc5153b1b1e0dff1f3349124eb3f6d565768f4..fd5314aae1fc9c5cc2319088fed0d321c9822f0b 100644 (file)
@@ -53,7 +53,7 @@ CONFIG_ROCKCHIP_DWMMC=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK808=y
index bdafc716aa8dd0bea963e8c674530eccab64db92..4122000489a93b5c64bc5795192769b8b7cba78f 100644 (file)
@@ -46,7 +46,7 @@ CONFIG_ROCKCHIP_DWMMC=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y
index 3e16b805caa8bea021465e7ea55fd527ba14f041..3b6d7d95e651ad010eb446d18299006deca15eb2 100644 (file)
@@ -44,7 +44,7 @@ CONFIG_ROCKCHIP_DWMMC=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y
index 89ebe92ce1c49aafaab2073060731f8a5e2ca40e..2067f87ccabdc141fa4c84650dc95728a1c5ddbf 100644 (file)
@@ -120,7 +120,7 @@ CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCI_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_ROCKCHIP_3036_PINCTRL=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_DM_PMIC=y
index 60c73398db4cdc326ae1c8c9ed718657b84081b7..2928da4af0328305c47ecd78d79dc89c9a3f9270 100644 (file)
@@ -112,7 +112,7 @@ CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCI_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_ROCKCHIP_3036_PINCTRL=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_DM_PMIC=y
index 1785e3b28cf5cabd962017e8bb173e27d2ec4e99..85dddd36a8d637555ad8b051e14476863455a7b7 100644 (file)
@@ -123,12 +123,12 @@ config QCA953X_PINCTRL
          both the GPIO definitions and pin control functions for each
          available multiplex function.
 
-config ROCKCHIP_PINCTRL
+config ROCKCHIP_RK3288_PINCTRL
        bool "Rockchip pin control driver"
        depends on DM
        help
-         Support pin multiplexing control on Rockchip SoCs. The driver is
-         controlled by a device tree node which contains both the GPIO
+         Support pin multiplexing control on Rockchip rk3288 SoCs. The driver
+         is controlled by a device tree node which contains both the GPIO
          definitions and pin control functions for each available multiplex
          function.
 
index 6fa7d00d0d8d4c1780f9cc774360c2d26af3ba54..6a84961ac06c9c350e9cd3923ce11facccdff6af 100644 (file)
@@ -5,5 +5,5 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-$(CONFIG_ROCKCHIP_PINCTRL) += pinctrl_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3288_PINCTRL) += pinctrl_rk3288.o
 obj-$(CONFIG_ROCKCHIP_3036_PINCTRL) += pinctrl_rk3036.o