ARM: k2g: Fix passing main pll info for higher speeds
authorLokesh Vutla <lokeshvutla@ti.com>
Sat, 20 May 2017 00:19:27 +0000 (05:49 +0530)
committerTom Rini <trini@konsulko.com>
Mon, 5 Jun 2017 18:13:03 +0000 (14:13 -0400)
Main pll is marked as arm plls for higher speeds. Fix this.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
board/ti/ks2_evm/board_k2g.c

index 21aec8f065627dd91a0b3b82a0e790cb233905b2..f0bd31d6f7521c399b9b9e46b0837e62f68b7783 100644 (file)
@@ -79,29 +79,29 @@ static struct pll_init_data main_pll_config[MAX_SYSCLK][NUM_SPDS] = {
                [SPD400]        = {MAIN_PLL, 125, 3, 2},
                [SPD600]        = {MAIN_PLL, 125, 2, 2},
                [SPD800]        = {MAIN_PLL, 250, 3, 2},
-               [SPD900]        = {TETRIS_PLL, 187, 2, 2},
-               [SPD1000]       = {TETRIS_PLL, 104, 1, 2},
+               [SPD900]        = {MAIN_PLL, 187, 2, 2},
+               [SPD1000]       = {MAIN_PLL, 104, 1, 2},
        },
        [SYSCLK_24MHz] = {
                [SPD400]        = {MAIN_PLL, 100, 3, 2},
                [SPD600]        = {MAIN_PLL, 300, 6, 2},
                [SPD800]        = {MAIN_PLL, 200, 3, 2},
-               [SPD900]        = {TETRIS_PLL, 75, 1, 2},
-               [SPD1000]       = {TETRIS_PLL, 250, 3, 2},
+               [SPD900]        = {MAIN_PLL, 75, 1, 2},
+               [SPD1000]       = {MAIN_PLL, 250, 3, 2},
        },
        [SYSCLK_25MHz] = {
                [SPD400]        = {MAIN_PLL, 32, 1, 2},
                [SPD600]        = {MAIN_PLL, 48, 1, 2},
                [SPD800]        = {MAIN_PLL, 64, 1, 2},
-               [SPD900]        = {TETRIS_PLL, 72, 1, 2},
-               [SPD1000]       = {TETRIS_PLL, 80, 1, 2},
+               [SPD900]        = {MAIN_PLL, 72, 1, 2},
+               [SPD1000]       = {MAIN_PLL, 80, 1, 2},
        },
        [SYSCLK_26MHz] = {
                [SPD400]        = {MAIN_PLL, 400, 13, 2},
                [SPD600]        = {MAIN_PLL, 230, 5, 2},
                [SPD800]        = {MAIN_PLL, 123, 2, 2},
-               [SPD900]        = {TETRIS_PLL, 69, 1, 2},
-               [SPD1000]       = {TETRIS_PLL, 384, 5, 2},
+               [SPD900]        = {MAIN_PLL, 69, 1, 2},
+               [SPD1000]       = {MAIN_PLL, 384, 5, 2},
        },
 };