E: DGE@sixnetio.com
D: EEPROM Speedup, SXNI855T port
-N: Thomas Elste
-E: info@elste.org
-D: Port for the ModNET50 Board, NET+50 CPU Port
-W: http://www.imms.de
-
N: Daniel Engstr?m
E: daniel@omicron.se
D: x86 port, Support for sc520_cdp board
imx27lite i.MX27
qong i.MX31
-Thomas Elste <info@elste.org>
-
- modnet50 ARM720T (NET+50)
-
Kristoffer Ericson <kristoffer.ericson@gmail.com>
jornada SA1110
LIST_SA="$(boards_by_cpu sa1100)"
-#########################################################################
-## ARM7 Systems
-#########################################################################
-
-LIST_ARM7=" \
- modnet50 \
-"
-
#########################################################################
## ARM9 Systems
#########################################################################
LIST_arm=" \
${LIST_SA} \
- ${LIST_ARM7} \
${LIST_ARM9} \
${LIST_ARM10} \
${LIST_ARM11} \
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := modnet50.o flash.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-CONFIG_SYS_TEXT_BASE = 0x00f00000
-#CROSS_COMPILE = arm-elf-
+++ /dev/null
-/*
- * (C) Copyright 2002
- * MAZeT GmbH <www.mazet.de>
- * Stephan Linz <linz@mazet.de>, <linz@li-pro.net>
- *
- * The most stuff comes from PPCBoot and Linux.
- *
- * IMMS gGmbH <www.imms.de>
- * Thomas Elste <info@elste.org>
- *
- * Modifications for ModNET50 Board
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/netarm_registers.h>
-
-#define SCR (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_SYSTEM_CONTROL))
-
-#define ALIGN_ABORT_OFF SCR = SCR & ~NETARM_GEN_SYS_CFG_ALIGN_ABORT
-#define ALIGN_ABORT_ON SCR = SCR | NETARM_GEN_SYS_CFG_ALIGN_ABORT
-
-#define PROG_ADDR (0x555*2)
-#define SETUP_ADDR (0x555*2)
-#define ID_ADDR (0x555*2)
-#define UNLOCK_ADDR1 (0x555*2)
-#define UNLOCK_ADDR2 (0x2AA*2)
-
-#define UNLOCK_CMD1 (0xAA)
-#define UNLOCK_CMD2 (0x55)
-#define ERASE_SUSPEND_CMD (0xB0)
-#define ERASE_RESUME_CMD (0x30)
-#define RESET_CMD (0xF0)
-#define ID_CMD (0x90)
-#define SECERASE_CMD (0x30)
-#define CHIPERASE_CMD (0x10)
-#define PROG_CMD (0xa0)
-#define SETUP_CMD (0x80)
-
-#define DQ2 (0x04)
-#define DQ3 (DQ2*2)
-#define DQ5 (DQ3*4)
-#define DQ6 (DQ5*2)
-
-#define WRITE_UNLOCK(addr) { \
- *(volatile __u16*)(addr + UNLOCK_ADDR1) = (__u16)UNLOCK_CMD1; \
- *(volatile __u16*)(addr + UNLOCK_ADDR2) = (__u16)UNLOCK_CMD2; \
-}
-
-#define CONFIG_AM29_RESERVED (0)
-#define K (1024)
-#define MB (4)
-
-#define CELL_SIZE (64*K)
-#define DEVICE_SIZE (MB*K*K)
-#define CELLS_PER_DEVICE (DEVICE_SIZE/CELL_SIZE)
-#define RESERVED_CELLS (CONFIG_AM29_RESERVED*K)/CELL_SIZE
-#define MAX_FLASH_DEVICES (1)
-#define AVAIL_SIZE (DEVICE_SIZE*MAX_FLASH_DEVICES - RESERVED_CELLS*CELL_SIZE)
-
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-static __u16 toggling_bits;
-
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_get_size (ulong baseaddr, flash_info_t * info)
-{
- short i;
- __u16 flashtest;
-
- /* Write auto select command sequence and test FLASH answer */
- WRITE_UNLOCK (baseaddr);
- *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) ID_CMD;
- flashtest /* manufacturer ID */ = *(volatile __u16 *) (baseaddr);
- *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) RESET_CMD;
-
- switch ((__u32) ((flashtest << 16) + flashtest)) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD & FLASH_VENDMASK;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ & FLASH_VENDMASK;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- /* Write auto select command sequence and test FLASH answer */
- WRITE_UNLOCK (baseaddr);
- *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) ID_CMD;
- flashtest /* device ID */ = *(volatile __u16 *) (baseaddr + 2);
- *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) RESET_CMD;
-
- /* toggling_bits = (flashtest == TOSHIBA)?(DQ6):(DQ2|DQ6); */
- toggling_bits = (DQ2 | DQ6);
-
- switch ((__u32) ((flashtest << 16) + flashtest)) {
- case AMD_ID_LV160B:
- info->flash_id +=
- (FLASH_AM160LV | FLASH_AM160B) & FLASH_TYPEMASK;
- info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- info->size = CONFIG_SYS_FLASH_SIZE;
- /* 1*16K Boot Block
- 2*8K Parameter Block
- 1*32K Small Main Block */
- info->start[0] = baseaddr;
- info->start[1] = baseaddr + 0x4000;
- info->start[2] = baseaddr + 0x6000;
- info->start[3] = baseaddr + 0x8000;
- for (i = 1; i < info->sector_count; i++)
- info->start[3 + i] = baseaddr + i * CONFIG_SYS_MAIN_SECT_SIZE;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* no or unknown flash */
- }
-
- for (i = 0; i < info->sector_count; i++) {
- /* Write auto select command sequence and test FLASH answer */
- WRITE_UNLOCK (info->start[i]);
- *(volatile __u16 *) (info->start[i] + ID_ADDR) = (__u16) ID_CMD;
- flashtest /* protected verify */ = *(volatile __u16 *) (info->start[i] + 4);
- *(volatile __u16 *) (info->start[i] + ID_ADDR) = (__u16) RESET_CMD;
- if (flashtest & 0x0001) {
- info->protect[i] = 1; /* D0 = 1 if protected */
- } else {
- info->protect[i] = 0;
- }
- }
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_init (void)
-{
- ulong size = 0;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here (only one bank) */
- size = flash_get_size (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN || size == 0) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size >> 20);
- }
-
- /*
- * protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("Fujitsu ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMDL323B:
- printf ("29DL323B (32 M, bottom sector)\n");
- break;
- case (FLASH_AM160LV | FLASH_AM160B):
- printf ("29LV160BE (1M x 16, bottom sector)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 4) == 0)
- printf ("\n ");
- printf (" S%02d @ 0x%08lX%s", i,
- info->start[i], info->protect[i] ? " !" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_check_protection (flash_info_t * info, int s_first, int s_last)
-{
- int sect, prot = 0;
-
- for (sect = s_first; sect <= s_last; sect++)
- if (info->protect[sect])
- prot++;
- if (prot)
- printf ("- can't erase %d protected sectors\n", prot);
- return prot;
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_check_erase_amd (ulong start)
-{
- __u16 v1, v2;
-
- v1 = *(volatile __u16 *) (start);
- v2 = *(volatile __u16 *) (start);
-
- if (((v1 ^ v2) & toggling_bits) == toggling_bits) {
- if (((v1 | v2) & DQ5) == DQ5) {
- printf ("[DQ5] ");
- /* OOPS: exceeded timing limits */
-
- v1 = *(volatile __u16 *) (start);
- v2 = *(volatile __u16 *) (start);
-
- if (((v1 ^ v2) & toggling_bits) == toggling_bits) {
-
- printf ("[%s] ",
- ((toggling_bits & (DQ2 | DQ6)) ==
- (DQ2 | DQ6)) ? "DQ2,DQ6" : "DQ6");
-
- /* OOPS: there is an erasure in progress,
- * try to reset chip */
- *(volatile __u16 *) (start) =
- (__u16) RESET_CMD;
-
- return 1; /* still busy */
- }
- }
- return 1; /* still busy */
- }
- return 0; /* be free */
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, sect, setup_offset = 0;
- int rc = ERR_OK;
- ulong start;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- return ERR_UNKNOWN_FLASH_TYPE;
- }
-
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return ERR_INVAL;
- }
-
- if (flash_check_protection (info, s_first, s_last))
- return ERR_PROTECTED;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_FUJ:
- case FLASH_MAN_AMD:
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (FLASH_AM160LV | FLASH_AM160B):
- setup_offset = UNLOCK_ADDR1; /* just the adress for setup_cmd differs */
- case FLASH_AMDL323B:
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc ();
- sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- if (info->protect[sect] == 0) {
- /* not protected */
- /* Write sector erase command sequence */
- WRITE_UNLOCK (info->start[0]);
- *(volatile __u16 *) (info->start[0] +
- setup_offset) =
- (__u16) SETUP_CMD;
- WRITE_UNLOCK (info->start[0]);
- *(volatile __u16 *) (info->
- start[sect]) =
- (__u16) SECERASE_CMD;
-
- /* wait some time */
- start = get_timer(0);
- while (get_timer(start) < 1000) {
- }
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
- while (flash_check_erase_amd (info->start[sect])) {
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("timeout!\n");
- /* OOPS: reach timeout,
- * try to reset chip
- */
- *(volatile __u16 *) (info-> start[sect]) = (__u16) RESET_CMD;
- rc = ERR_TIMOUT;
- goto outahere_323B;
- }
- }
- printf ("ok.\n");
- } else {
- printf ("protected!\n");
- }
- }
- if (ctrlc ())
- printf ("User Interrupt!\n");
-outahere_323B:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
- if (flag)
- enable_interrupts ();
- return rc;
- default:
- printf ("- unknown chip type\n");
- return ERR_UNKNOWN_FLASH_TYPE;
- }
- break;
- default:
- printf ("- unknown vendor ");
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_check_write_amd (ulong dest)
-{
- __u16 v1, v2;
-
- v1 = *(volatile __u16 *) (dest);
- v2 = *(volatile __u16 *) (dest);
-
- /* DQ6 toggles during write */
- if (((v1 ^ v2) & DQ6) == DQ6) {
- if (((v1 | v2) & DQ5) == DQ5) {
- printf ("[DQ5] @ %08lX\n", dest);
-
- /* OOPS: exceeded timing limits,
- * try to reset chip */
- *(volatile __u16 *) (dest) = (__u16) RESET_CMD;
- return 0; /* be free */
- }
- return 1; /* still busy */
- }
-
- return 0; /* be free */
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-static int write_word (flash_info_t * info, ulong dest, ushort data)
-{
- int rc = ERR_OK;
- int flag;
- ulong start;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*(__u16 *) (dest) & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- /* Write program command sequence */
- WRITE_UNLOCK (info->start[0]);
-
- /* Flash dependend program seqence */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_FUJ:
- case FLASH_MAN_AMD:
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (FLASH_AM160LV | FLASH_AM160B):
- *(volatile __u16 *) (info->start[0] + UNLOCK_ADDR1) =
- (__u16) PROG_CMD;
- *(volatile __u16 *) (dest) = (__u16) data;
- break;
- case FLASH_AMDL323B:
- *(volatile __u16 *) (dest) = (__u16) PROG_CMD;
- *(volatile __u16 *) (dest) = (__u16) data;
- break;
- }
- }
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- while (flash_check_write_amd (dest)) {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- printf ("timeout! @ %08lX\n", dest);
- /* OOPS: reach timeout,
- * try to reset chip */
- *(volatile __u16 *) (dest) = (__u16) RESET_CMD;
-
- rc = ERR_TIMOUT;
- goto outahere_323B;
- }
- }
-
- /* Check if Flash was (accurately) written */
- if (*(__u16 *) (dest) != data)
- rc = ERR_PROG_ERROR;
-
-outahere_323B:
- if (flag)
- enable_interrupts ();
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- ushort data;
- int l;
- int i, rc;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
- for (; i < 2 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- data = *((ushort *) src);
- if ((rc = write_word (info, wp, data)) != 0)
- return (rc);
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0)
- return ERR_OK;
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- return write_word (info, wp, data);
-}
+++ /dev/null
-/*
- * Memory Setup stuff - taken from Linux
- *
- * Copyright (c) 2002 Stephan Linz <linz@mazet.de>, <linz@li-pro.net>
- * (c) 2004 IMMS gGmbH <www.imms.de>, Thomas Elste <info@elste.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/netarm_registers.h>
-
-
-/* some parameters for the board */
-#define FLASH_90ns_WAIT_STATES ((NETARM_PLL_COUNT_VAL + 2) / 3)
-#define FLASH_70ns_WAIT_STATES 4
-
-#define NETARM_MMAP_CS0_BASE (PHYS_FLASH_1)
-#if 1
-#define NETARM_MMAP_CS0_MASK (~(PHYS_FLASH_1_SIZE - 1))
-#else
-#define NETARM_MMAP_CS0_MASK (~(1000000 - 1))
-#endif
-#define NETARM_MMAP_CS1_BASE (PHYS_SDRAM_1)
-#define NETARM_MMAP_CS1_MASK (~(PHYS_SDRAM_1_SIZE - 1))
-#define NETARM_MMAP_CS2_BASE (PHYS_SDRAM_2)
-#define NETARM_MMAP_CS2_MASK (~(PHYS_SDRAM_2_SIZE - 1))
-#if defined(CONFIG_NETARM_EEPROM) && defined(PHYS_NVRAM_1) && defined(PHYS_NVRAM_SIZE)
-#define NETARM_MMAP_CS3_BASE (PHYS_NVRAM_1)
-#define NETARM_MMAP_CS3_MASK (~(PHYS_NVRAM_SIZE - 1))
-#endif
-#define NETARM_MMAP_CS4_BASE (PHYS_EXT_1)
-#define NETARM_MMAP_CS4_MASK (~(PHYS_EXT_SIZE - 1))
-
-/* setting up the memory */
-.globl lowlevel_init
-lowlevel_init:
-
-#if defined(CONFIG_MODNET50)
- ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - CONFIG_SYS_TEXT_BASE)
-
-_jump_to_high:
- /*
- * MEM Config Reg
- * ---------------------------------------------------
- */
- ldr r0, =NETARM_MEM_MODULE_BASE
- ldr r1, =( NETARM_MEM_REFR_PERIOD_USEC(16) | \
- NETARM_MEM_CFG_REFRESH_EN | \
- NETARM_MEM_CFG_REFR_CYCLE_5CLKS )
- str r1, [r0, #+NETARM_MEM_MODULE_CONFIG]
-
-
-memsetup_cs0:
- /*
- * Base Addr / Option Reg 0 (Flash)
- * ---------------------------------------------------
- */
- ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS0_BASE) | \
- NETARM_MEM_BAR_DRAM_FP | \
- NETARM_MEM_BAR_DRAM_MUX_INT | \
- NETARM_MEM_BAR_DRAM_MUX_BAL | \
- NETARM_MEM_BAR_VALID )
- str r1, [r0, #+NETARM_MEM_CS0_BASE_ADDR]
-
- /* trust that the bus size for flash was strapped correctly */
- /* this saves the bus width in r2 and then ORs it back in */
- /* it's pretty safe assumption, otherwise it wouldn't boot */
- ldr r2, [r0, #+NETARM_MEM_CS0_OPTIONS]
- and r2, r2, #NETARM_MEM_OPT_BUS_SIZE_MASK
-
-/* just a test: assume 32 bit flash mem */
-/* mov r2, #NETARM_MEM_OPT_32BIT */
-
- ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS0_MASK) | \
- NETARM_MEM_OPT_WAIT_STATES(FLASH_70ns_WAIT_STATES) | \
- NETARM_MEM_OPT_BCYC_4 | \
- NETARM_MEM_OPT_BSIZE_16 | \
- NETARM_MEM_OPT_16BIT | \
- NETARM_MEM_OPT_READ_ASYNC | \
- NETARM_MEM_OPT_WRITE_ASYNC )
-
- orr r1, r1, r2
- str r1, [r0, #+NETARM_MEM_CS0_OPTIONS]
-
-
-memsetup_cs1:
- /*
- * Base Addr / Option Reg 1 (DRAM #1)
- * ---------------------------------------------------
- */
-#ifdef CONFIG_NETARM_NET40_REV2
- /* we have to config SDRAM in burst mode */
- ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS1_MASK) | \
- NETARM_MEM_OPT_BCYC_2 | \
- NETARM_MEM_OPT_BSIZE_16 | \
- NETARM_MEM_OPT_WAIT_STATES(0) | \
- NETARM_MEM_OPT_32BIT | \
- NETARM_MEM_OPT_READ_ASYNC | \
- NETARM_MEM_OPT_WRITE_ASYNC )
- str r1, [r0, #+NETARM_MEM_CS1_OPTIONS]
-
- ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS1_BASE) | \
- NETARM_MEM_BAR_DRAM_SYNC | \
- NETARM_MEM_BAR_DRAM_MUX_INT | \
- NETARM_MEM_BAR_DRAM_MUX_UNBAL | \
- NETARM_MEM_BAR_DRAM_SEL | \
- NETARM_MEM_BAR_BURST_EN | \
- NETARM_MEM_BAR_VALID )
- str r1, [r0, #+NETARM_MEM_CS1_BASE_ADDR]
-#else
- /* we have to config FPDRAM in burst mode with smaller burst access size */
- ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS1_MASK) | \
- NETARM_MEM_OPT_BCYC_2 | \
- NETARM_MEM_OPT_BSIZE_16 | \
- NETARM_MEM_OPT_WAIT_STATES(0) | \
- NETARM_MEM_OPT_32BIT | \
- NETARM_MEM_OPT_READ_ASYNC | \
- NETARM_MEM_OPT_WRITE_ASYNC )
- str r1, [r0, #+NETARM_MEM_CS1_OPTIONS]
-
- ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS1_BASE) | \
- NETARM_MEM_BAR_DRAM_SYNC | \
- NETARM_MEM_BAR_DRAM_MUX_INT | \
- NETARM_MEM_BAR_DRAM_MUX_UNBAL | \
- NETARM_MEM_BAR_DRAM_SEL | \
- NETARM_MEM_BAR_BURST_EN | \
- NETARM_MEM_BAR_VALID )
- str r1, [r0, #+NETARM_MEM_CS1_BASE_ADDR]
-
-#endif /* CONFIG_NETARM_NET40_REV2 */
-
-
-memsetup_cs3:
- /*
- * Base Addr / Option Reg 3 (EEPROM, NVRAM)
- * ---------------------------------------------------
- */
-#if defined(CONFIG_NETARM_EEPROM) && defined(PHYS_NVRAM_1) && defined(PHYS_NVRAM_SIZE)
- ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS3_MASK) | \
- NETARM_MEM_OPT_BCYC_3 | \
- NETARM_MEM_OPT_BSIZE_2 | \
- NETARM_MEM_OPT_WAIT_STATES(10) | \
- NETARM_MEM_OPT_8BIT | \
- NETARM_MEM_OPT_READ_ASYNC | \
- NETARM_MEM_OPT_WRITE_ASYNC )
- str r1, [r0, #+NETARM_MEM_CS3_OPTIONS]
-
- ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS3_BASE) | \
- NETARM_MEM_BAR_DRAM_FP | \
- NETARM_MEM_BAR_DRAM_MUX_INT | \
- NETARM_MEM_BAR_DRAM_MUX_BAL | \
- NETARM_MEM_BAR_VALID )
- str r1, [r0, #+NETARM_MEM_CS3_BASE_ADDR]
-#else
- /* we don't need EEPROM --> no config */
- ldr r1, =( 0 )
- str r1, [r0, #+NETARM_MEM_CS3_OPTIONS]
-
- ldr r1, =( 0 )
- str r1, [r0, #+NETARM_MEM_CS3_BASE_ADDR]
-#endif
-
-
-#else
-/*
-#error "missing CONFIG_MODNET50 (see your config.h)"
-*/
-#endif /* CONFIG_MODNET50 */
-
-
-lowlevel_init_end:
- /*
- * manipulate address in lr and ip to match new
- * address space
- */
- ldr r3, =(NETARM_MMAP_CS0_BASE)
- mov r0, lr
- add r0, r3, r0
- mov lr, r0
- mov r0, ip
- add r0, r3, r0
- mov ip, r0
-
- /* everything is fine now */
- mov pc, lr
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- /* address for the kernel command line */
- gd->bd->bi_boot_params = 0x800;
- return 0;
-}
-
-int dram_init (void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- if (CONFIG_NR_DRAM_BANKS == 2) {
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- }
- return (0);
-}
mx35pdk arm arm1136 - freescale mx35
omap2420h4 arm arm1136 - ti omap24xx
tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x
-modnet50 arm arm720t
integratorap_cm720t arm arm720t integrator armltd - integratorap
integratorap_cm920t arm arm920t integrator armltd - integratorap
integratorcp_cm920t arm arm920t integrator armltd - integratorcp
+++ /dev/null
-U-BOOT Port for FSForth ModNET50 Board
---------------------------------------
-
-author: Thomas Elste <info@elste.org>
- IMMS gGmbH <www.imms.de>
-
-The port based upon an early (partial complete)
-armboot-port from Stephan Linz for the ModNET50 Board.
-
-
-Overview:
-
-- board with Netsilicon NET+50 ARM7TDMI CPU without MMU
-- 16 MB SDRAM
-- 2 MB Flash (MBL29LV160BE)
-- 10/100 Ethernet PHY (LXT971A)
-
-
-Current Configuration (include/configs/modnet50.h):
-
-Memory Map: 0x00000000 - 0x00FFFFFF 16M SDRAM
- 0x10000000 - 0x101FFFFF 2M Flash
-
-The Flash uses a BB-Architectur with 35 sectors
-(0:16K; 1,2:8K; 3:32K; 4-34:64K). U-Boot is located in
-the first 5 sectors.
-
-The environment is located at the end of the 4th Flash
-sector (0x1001C000-0x1001FFFF).
-
-Build:
-
-U-boot should be build by using the ELDK Toolchain (arm-linux-*).
-
- make modnet50_config
- make
-
-
-Status:
-
-Everything seems to work fine. Booting images was tested by
-booting uCLinux (with and without a separate ramdisk image) from
-flash.
-
-
-Files:
-
-arch/arm/cpu/arm720t/serial_netarm.c .. serial I/O for the cpu
-
-board/modnet50/lowlevel_init.S .. memory setup for ModNET50
-board/modnet50/flash.c .. flash routines
-board/modnet50/modnet50.c .. some board init stuff
-
-drivers/net/netarm_eth.c .. ethernet driver for the NET+50 CPU
-drivers/net/netarm_eth.h .. header for ethernet driver
-
-include/configs/modnet50.h .. configuration file for ModNET50
-
-include/netarm_*.h .. register and macro definitions for
- the NETARM CPU family
-
-doc/README.modnet50 .. this readme
Board Arch CPU removed Commit last known maintainer/contact
=============================================================================
+modnet50 arm arm720t - 2011-09-05 Thomas Elste <info@elste.org>
lpc2292sodimm arm arm720t - 2011-09-05
lart arm sa1100 - 2011-09-05 Alex Züpke <azu@sysgo.de>
impa7 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de>
+++ /dev/null
-/*
- * (C) Copyright 2004
- * IMMS, gGmbH <www.imms.de>
- * Thomas Elste <info@elste.org>
- *
- * Configuation settings for ModNET50 board.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
-#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
-#define CONFIG_NETARM /* it's a Netsiclicon NET+ARM */
-#undef CONFIG_NETARM_NET40_REV2 /* it's a Net+40 Rev. 2 */
-#undef CONFIG_NETARM_NET40_REV4 /* it's a Net+40 Rev. 4 */
-#define CONFIG_NETARM_NET50 /* it's a Net+50 */
-
-#define CONFIG_MODNET50 1 /* on an ModNET50 Board */
-
-#undef CONFIG_USE_IRQ /* don't need them anymore */
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_DRIVER_NETARMETH 1
-
-/*
- * select serial console configuration
- */
-#define CONFIG_NETARM_SERIAL
-#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_BAUDRATE 38400
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_JFFS2
-
-
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.30.2
-#define CONFIG_SERVERIP 192.168.30.122
-#define CONFIG_SYS_ETH_PHY_ADDR 0x100
-#define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */
-
-/*#define CONFIG_BOOTDELAY 10*/
-/* args and cmd for uClinux-image @ 0x10020000, ramdisk-image @ 0x100a0000 */
-#define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000"
-#define CONFIG_BOOTARGS "console=ttyS0,38400 initrd=0x100a0040,530K " \
- "root=/dev/ram keepinitrd"
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "modnet50 # " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x00500000 /* default load address */
-
-#define CONFIG_SYS_HZ 900 /* decrementer freq: 2 kHz */
-
- /* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
-*/
-#define CONFIG_STACKSIZE (128*1024) /* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
-#endif
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
-#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
-#define PHYS_SDRAM_2 0x01000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
-
-#define PHYS_FLASH_1 0x10000000 /* Flash Bank #1 */
-#define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip only, 16bit access) */
-
-#define PHYS_FLASH_2 0x10200001
-#define PHYS_FLASH_2_SIZE 0x00200000
-
-#define CONFIG_NETARM_EEPROM
-/* #ifdef CONFIG_NETARM_EEPROM */
-#define PHYS_NVRAM_1 0x20000000 /* EEPROM Bank #1 */
-#define PHYS_NVRAM_SIZE 0x00002000 /* 8 KB */
-/* #endif */
-
-#define PHYS_EXT_1 0x30000000 /* Extensions Bank #1 */
-#define PHYS_EXT_SIZE 0x01000000 /* 32 MB memory mapped I/O */
-
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-#define CONFIG_SYS_FLASH_SIZE PHYS_FLASH_1_SIZE
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
-#define CONFIG_SYS_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-/* environment settings */
-#define CONFIG_ENV_IS_IN_FLASH
-#undef CONFIG_ENV_IS_NOWHERE
-
-#define CONFIG_ENV_ADDR 0x1001C000 /* environment start address */
-#define CONFIG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
-#define CONFIG_ENV_SIZE 0x4000 /* max size for environment */
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00080000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT "nor0=modnet50-0"
-#define MTDPARTS_DEFAULT "mtdparts=modnet50-0:-@512k(jffs2)"
-*/
-
-#endif /* __CONFIG_H */