obj-$(CONFIG_ROCKCHIP_RK3288) += board.o
endif
obj-y += rk_timer.o
-obj-y += rk_early_print.o
obj-$(CONFIG_$(SPL_)ROCKCHIP_COMMON) += common.o
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
*/
#include <common.h>
+#include <debug_uart.h>
#include <asm/io.h>
#include <asm/arch/grf_rk3036.h>
#include <asm/arch/hardware.h>
GPIO1C2_MASK << GPIO1C2_SHIFT,
GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
- rk_uart_init((void *)DEBUG_UART_BASE);
+ debug_uart_init();
#endif
rockchip_timer_init();
sdram_init();
while (1)
;
}
+
+void hang(void)
+{
+ while (1)
+ ;
+}
+++ /dev/null
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <asm/arch/uart.h>
-#include <common.h>
-
-static struct rk_uart *uart_ptr;
-
-static void uart_wrtie_byte(char byte)
-{
- writel(byte, &uart_ptr->rbr);
- while (!(readl(&uart_ptr->lsr) & 0x40))
- ;
-}
-
-void print(char *s)
-{
- while (*s) {
- if (*s == '\n')
- uart_wrtie_byte('\r');
- uart_wrtie_byte(*s);
- s++;
- }
-}
-
-void print_hex(unsigned int n)
-{
- int i;
- int temp;
-
- uart_wrtie_byte('0');
- uart_wrtie_byte('x');
-
- for (i = 8; i > 0; i--) {
- temp = (n >> (i - 1) * 4) & 0x0f;
- if (temp < 10)
- uart_wrtie_byte((char)(temp + '0'));
- else
- uart_wrtie_byte((char)(temp - 10 + 'a'));
- }
- uart_wrtie_byte('\n');
- uart_wrtie_byte('\r');
-}
-
-/*
- * TODO: since rk3036 only 4K sram to use in SPL, for saving space,
- * we implement uart driver this way, we should convert this to use
- * ns16550 driver in future, which support DEBUG_UART in the standard way
- */
-void rk_uart_init(void *base)
-{
- uart_ptr = (struct rk_uart *)base;
- writel(0x83, &uart_ptr->lcr);
- writel(0x0d, &uart_ptr->rbr);
- writel(0x03, &uart_ptr->lcr);
-
- /* fifo enable, sfe is shadow register of FCR[0] */
- writel(0x01, &uart_ptr->sfe);
-}
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_NS16550=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+# CONFIG_SPL_SERIAL_PRESENT is not set