spi: dw: invert wait condition in dw_spi_xfer
authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Thu, 19 Apr 2018 14:47:41 +0000 (17:47 +0300)
committerJagan Teki <jagan@amarulasolutions.com>
Mon, 23 Apr 2018 05:46:41 +0000 (11:16 +0530)
While switching to readl_poll_timeout macros from custom code
the waiting condition was accidently inverted, so it was pure
luck that this code works at least in some conditions.

Fix that by inverting exit condition for readl_poll_timeout.

Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush")

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
drivers/spi/designware_spi.c

index 0e93b62eee1ed6ec9bde0d338572f4aa073015c5..5e2d290ddcf6e34f552e68afe9917fdc62c26691 100644 (file)
@@ -425,7 +425,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
         * in the beginning of new transfer.
         */
        if (readl_poll_timeout(priv->regs + DW_SPI_SR, val,
-                              !(val & SR_TF_EMPT) || (val & SR_BUSY),
+                              (val & SR_TF_EMPT) && !(val & SR_BUSY),
                               RX_TIMEOUT * 1000)) {
                ret = -ETIMEDOUT;
        }