arm: dts: k3-j721e: Add initial support for common processor board
authorLokesh Vutla <lokeshvutla@ti.com>
Thu, 13 Jun 2019 04:59:54 +0000 (10:29 +0530)
committerTom Rini <trini@konsulko.com>
Sat, 27 Jul 2019 01:49:29 +0000 (21:49 -0400)
Common Processor board is the baseboard that has most of the actual connectors,
power supply etc. A SOM (System on Module) is plugged on to the common
processor board and this contains the SoC, PMIC, DDR and basic highspeed
components necessary for functionality. Add initial dt support for this
common processor board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
arch/arm/dts/Makefile
arch/arm/dts/k3-j721e-common-proc-board.dts [new file with mode: 0644]
arch/arm/dts/k3-j721e-som-p0.dtsi [new file with mode: 0644]

index e985884d9ac6baf014c54f88520a091c9a7f8563..50910be312da6111397bbef8aeca105ef17c4942 100644 (file)
@@ -772,6 +772,7 @@ dtb-$(CONFIG_TARGET_STM32MP1) += \
        stm32mp157c-ev1.dtb
 
 dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb k3-am654-r5-base-board.dtb
+dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb
 
 dtb-$(CONFIG_ARCH_MEDIATEK) += \
        mt7623n-bananapi-bpi-r2.dtb \
diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts
new file mode 100644 (file)
index 0000000..b5b8c3c
--- /dev/null
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/dts-v1/;
+
+#include "k3-j721e-som-p0.dtsi"
+
+/ {
+       chosen {
+               stdout-path = "serial2:115200n8";
+               bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
+       };
+};
+
+&wkup_uart0 {
+       /* Wakeup UART is used by System firmware */
+       status = "disabled";
+};
+
+&main_uart3 {
+       /* UART not brought out */
+       status = "disabled";
+};
+
+&main_uart5 {
+       /* UART not brought out */
+       status = "disabled";
+};
+
+&main_uart6 {
+       /* UART not brought out */
+       status = "disabled";
+};
+
+&main_uart7 {
+       /* UART not brought out */
+       status = "disabled";
+};
+
+&main_uart8 {
+       /* UART not brought out */
+       status = "disabled";
+};
+
+&main_uart9 {
+       /* UART not brought out */
+       status = "disabled";
+};
+
+&main_sdhci0 {
+       /* eMMC */
+       voltage-ranges = <1800 1800>;
+       non-removable;
+       ti,driver-strength-ohm = <50>;
+};
+
+&main_sdhci1 {
+       /* SD/MMC */
+       voltage-ranges = <1800 1800 3300 3300>;
+       ti,driver-strength-ohm = <50>;
+};
diff --git a/arch/arm/dts/k3-j721e-som-p0.dtsi b/arch/arm/dts/k3-j721e-som-p0.dtsi
new file mode 100644 (file)
index 0000000..1884fc7
--- /dev/null
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/dts-v1/;
+
+#include "k3-j721e.dtsi"
+
+/ {
+       memory@80000000 {
+               device_type = "memory";
+               /* 4G RAM */
+               reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
+                     <0x00000008 0x80000000 0x00000000 0x80000000>;
+       };
+
+       reserved_memory: reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               secure_ddr: optee@9e800000 {
+                       reg = <0x00 0x9e800000 0x00 0x01800000>;
+                       alignment = <0x1000>;
+                       no-map;
+               };
+       };
+};