--- /dev/null
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+PKG_CHECK_FORMAT_SECURITY ?= 1
+PKG_SSP ?= 1
+PKG_FORTIFY_SOURCE ?= 1
+PKG_RELRO ?= 1
+
+ifdef CONFIG_PKG_CHECK_FORMAT_SECURITY
+ ifeq ($(strip $(PKG_CHECK_FORMAT_SECURITY)),1)
+ TARGET_CFLAGS += -Wformat -Werror=format-security
+ endif
+endif
+ifdef CONFIG_PKG_CC_STACKPROTECTOR_REGULAR
+ ifeq ($(strip $(PKG_SSP)),1)
+ TARGET_CFLAGS += -fstack-protector
+ endif
+endif
+ifdef CONFIG_PKG_CC_STACKPROTECTOR_STRONG
+ ifeq ($(strip $(PKG_SSP)),1)
+ TARGET_CFLAGS += -fstack-protector-strong
+ endif
+endif
+ifdef CONFIG_PKG_FORTIFY_SOURCE_1
+ ifeq ($(strip $(PKG_FORTIFY_SOURCE)),1)
+ TARGET_CFLAGS += -D_FORTIFY_SOURCE=1
+ endif
+endif
+ifdef CONFIG_PKG_FORTIFY_SOURCE_2
+ ifeq ($(strip $(PKG_FORTIFY_SOURCE)),1)
+ TARGET_CFLAGS += -D_FORTIFY_SOURCE=2
+ endif
+endif
+ifdef CONFIG_PKG_RELRO_PARTIAL
+ ifeq ($(strip $(PKG_RELRO)),1)
+ TARGET_CFLAGS += -Wl,-z,relro
+ TARGET_LDFLAGS += -zrelro
+ endif
+endif
+ifdef CONFIG_PKG_RELRO_FULL
+ ifeq ($(strip $(PKG_RELRO)),1)
+ TARGET_CFLAGS += -Wl,-z,now -Wl,-z,relro
+ TARGET_LDFLAGS += -znow -zrelro
+ endif
+endif
+
-#
-# Copyright (C) 2006-2011 OpenWrt.org
+#
+# Copyright (C) 2006-2015 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
endif
KERNEL_BUILD_DIR ?= $(BUILD_DIR)/linux-$(BOARD)$(if $(SUBTARGET),_$(SUBTARGET))
LINUX_DIR ?= $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)
- ifeq ($(strip $(call CompareKernelPatchVer,$(KERNEL_PATCHVER),ge,3.7.0)),1)
- LINUX_UAPI_DIR=uapi/
- endif
+ LINUX_UAPI_DIR=uapi/
LINUX_VERMAGIC:=$(strip $(shell cat $(LINUX_DIR)/.vermagic 2>/dev/null))
LINUX_VERMAGIC:=$(if $(LINUX_VERMAGIC),$(LINUX_VERMAGIC),unknown)
LINUX_UNAME_VERSION:=$(LINUX_UNAME_VERSION)-$(strip $(lastword $(subst -, ,$(LINUX_VERSION))))
endif
- MODULES_SUBDIR:=lib/modules/$(LINUX_VERSION)-gnu
+ MODULES_SUBDIR:=lib/modules/$(LINUX_UNAME_VERSION)-gnu
TARGET_MODULES_DIR := $(LINUX_TARGET_DIR)/$(MODULES_SUBDIR)
LINUX_KERNEL:=$(KERNEL_BUILD_DIR)/vmlinux
LINUX_SOURCE:=linux-libre-$(LINUX_VERSION)-gnu.tar.xz
TESTING:=$(if $(findstring -rc,$(LINUX_VERSION)),/testing,)
ifeq ($(call qstrip,$(CONFIG_EXTERNAL_KERNEL_TREE))$(call qstrip,$(CONFIG_KERNEL_GIT_CLONE_URI)),)
- LINUX_SITE:=@KERNEL/linux/kernel/v3.x$(TESTING)
+ LINUX_SITE:=@KERNEL/$(LINUX_VERSION)-gnu$(TESTING)
endif
ifneq ($(TARGET_BUILD),1)
ifneq (,$(findstring uml,$(BOARD)))
LINUX_KARCH=um
+else ifneq (,$(findstring $(ARCH), aarch64 aarch64_be))
+ LINUX_KARCH := arm64
+else ifneq (,$(findstring $(ARCH), armeb))
+ LINUX_KARCH := arm
+else ifneq (,$(findstring $(ARCH), mipsel mips64 mips64el))
+ LINUX_KARCH := mips
+else ifneq (,$(findstring $(ARCH), sh2 sh3 sh4))
+ LINUX_KARCH := sh
+else ifneq (,$(findstring $(ARCH), i386 x86_64))
+ LINUX_KARCH := x86
else
- ifeq (,$(LINUX_KARCH))
- LINUX_KARCH=$(strip $(subst i386,x86,$(subst armeb,arm,$(subst mipsel,mips,$(subst mips64,mips,$(subst mips64el,mips,$(subst sh2,sh,$(subst sh3,sh,$(subst sh4,sh,$(subst aarch64,arm64,$(subst aarch64_be,arm64,$(ARCH))))))))))))
- endif
+ LINUX_KARCH := $(ARCH)
endif
-
define KernelPackage/Defaults
FILES:=
AUTOLOAD:=
mkdir -p $(2)/etc/modules-boot.d; \
ln -s ../modules.d/$(1) $(2)/etc/modules-boot.d/; \
fi; \
- modules="$$$$$$$${modules:+$$$$$$$$modules}"; \
+ modules="$$$$$$$${modules:+$$$$$$$$modules }$$$$$$$$mods"; \
fi; \
}; \
add_module() { \
if [ -n "$$$$$$$$modules" ]; then \
mkdir -p $(2)/etc/modules.d; \
mkdir -p $(2)/CONTROL; \
- echo "#!/bin/sh" > $(2)/CONTROL/postinst; \
- echo "[ -z \"\$$$$$$$$IPKG_INSTROOT\" ] || exit 0" >> $(2)/CONTROL/postinst; \
- echo ". /lib/functions.sh" >> $(2)/CONTROL/postinst; \
- echo "insert_modules $$$$$$$$modules" >> $(2)/CONTROL/postinst; \
- chmod 0755 $(2)/CONTROL/postinst; \
+ echo "#!/bin/sh" > $(2)/CONTROL/postinst-pkg; \
+ echo "[ -z \"\$$$$$$$$IPKG_INSTROOT\" ] || exit 0" >> $(2)/CONTROL/postinst-pkg; \
+ echo ". /lib/functions.sh" >> $(2)/CONTROL/postinst-pkg; \
+ echo "insert_modules $$$$$$$$modules" >> $(2)/CONTROL/postinst-pkg; \
+ chmod 0755 $(2)/CONTROL/postinst-pkg; \
fi
endef
$(call KernelPackage/$(1)/$(BOARD))
endef
+ ifdef KernelPackage/$(1)/conffiles
+ define Package/kmod-$(1)/conffiles
+$(call KernelPackage/$(1)/conffiles)
+ endef
+ endif
+
ifdef KernelPackage/$(1)/description
define Package/kmod-$(1)/description
$(call KernelPackage/$(1)/description)
ifneq ($(if $(filter-out %=y %=n %=m,$(KCONFIG)),$(filter m y,$(foreach c,$(filter-out %=y %=n %=m,$(KCONFIG)),$($(c)))),.),)
ifneq ($(if $(SDK),$(filter-out $(LINUX_DIR)/%.ko,$(FILES)),$(strip $(FILES))),)
define Package/kmod-$(1)/install
- @for mod in $$(FILES); do \
- if [ -e $$$$$$$$mod ]; then \
+ @for mod in $$(call version_filter,$$(FILES)); do \
+ if grep -q "$$$$$$$${mod##$(LINUX_DIR)/}" "$(LINUX_DIR)/modules.builtin"; then \
+ echo "NOTICE: module '$$$$$$$$mod' is built-in."; \
+ elif [ -e $$$$$$$$mod ]; then \
mkdir -p $$(1)/$(MODULES_SUBDIR) ; \
$(CP) -L $$$$$$$$mod $$(1)/$(MODULES_SUBDIR)/ ; \
- elif [ -e "$(LINUX_DIR)/modules.builtin" ]; then \
- if grep -q "$$$$$$$${mod##$(LINUX_DIR)/}" "$(LINUX_DIR)/modules.builtin"; then \
- echo "NOTICE: module '$$$$$$$$mod' is built-in."; \
- else \
- echo "ERROR: module '$$$$$$$$mod' is missing." >&2; \
- exit 1; \
- fi; \
else \
- echo "WARNING: module '$$$$$$$$mod' missing and modules.builtin not available, assuming built-in." >&2; \
+ echo "ERROR: module '$$$$$$$$mod' is missing." >&2; \
+ exit 1; \
fi; \
done;
$(call ModuleAutoLoad,$(1),$$(1),$(AUTOLOAD))
$$(IPKG_kmod-$(1)): $$(wildcard $$(FILES))
endef
+version_filter=$(if $(findstring @,$(1)),$(shell $(SCRIPT_DIR)/metadata.pl version_filter $(KERNEL_PATCHVER) $(1)),$(1))
+
define AutoLoad
- add_module "$(1)" "$(2)" "$(3)";
+ add_module "$(1)" "$(call version_filter,$(2))" "$(3)";
endef
define AutoProbe
- probe_module "$(1)" "$(2)";
+ probe_module "$(call version_filter,$(1))" "$(2)";
endef
version_field=$(if $(word $(1),$(2)),$(word $(1),$(2)),0)
case ATH79_SOC_AR9330:
case ATH79_SOC_AR9331:
case ATH79_SOC_QCA9533:
+ case ATH79_SOC_QCA9561:
+ case ATH79_SOC_TP9343:
mdio_dev = &ath79_mdio1_device;
mdio_data = &ath79_mdio1_data;
break;
break;
case ATH79_SOC_QCA9533:
+ case ATH79_SOC_QCA9561:
+ case ATH79_SOC_TP9343:
mdio_data->builtin_switch = 1;
break;
case ATH79_SOC_QCA9533:
case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558:
+ case ATH79_SOC_QCA9561:
+ case ATH79_SOC_TP9343:
pll_10 = AR934X_PLL_VAL_10;
pll_100 = AR934X_PLL_VAL_100;
pll_1000 = AR934X_PLL_VAL_1000;
case ATH79_SOC_AR9330:
case ATH79_SOC_AR9331:
case ATH79_SOC_QCA9533:
+ case ATH79_SOC_QCA9561:
+ case ATH79_SOC_TP9343:
pdata->phy_if_mode = PHY_INTERFACE_MODE_MII;
break;
case ATH79_SOC_AR7241:
case ATH79_SOC_AR9330:
case ATH79_SOC_AR9331:
- case ATH79_SOC_QCA9533:
+ case ATH79_SOC_QCA9561:
+ case ATH79_SOC_TP9343:
pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII;
break;
case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344:
+ case ATH79_SOC_QCA9533:
switch (pdata->phy_if_mode) {
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_GMII:
iounmap(base);
}
+void __init ath79_setup_ar934x_eth_rx_delay(unsigned int rxd,
+ unsigned int rxdv)
+{
+ void __iomem *base;
+ u32 t;
+
+ rxd &= AR934X_ETH_CFG_RXD_DELAY_MASK;
+ rxdv &= AR934X_ETH_CFG_RDV_DELAY_MASK;
+
+ base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
+
+ t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
+
+ t &= ~(AR934X_ETH_CFG_RXD_DELAY_MASK << AR934X_ETH_CFG_RXD_DELAY_SHIFT |
+ AR934X_ETH_CFG_RDV_DELAY_MASK << AR934X_ETH_CFG_RDV_DELAY_SHIFT);
+
+ t |= (rxd << AR934X_ETH_CFG_RXD_DELAY_SHIFT |
+ rxdv << AR934X_ETH_CFG_RDV_DELAY_SHIFT);
+
+ __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
+ /* flush write */
+ __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
+
+ iounmap(base);
+}
+
void __init ath79_setup_qca955x_eth_cfg(u32 mask)
{
void __iomem *base;
case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344:
+ case ATH79_SOC_QCA9533:
if (id == 0) {
pdata->reset_bit = AR934X_RESET_GE0_MAC |
AR934X_RESET_GE0_MDIO;
pdata->fifo_cfg3 = 0x01f00140;
break;
- case ATH79_SOC_QCA9533:
+ case ATH79_SOC_QCA9561:
+ case ATH79_SOC_TP9343:
if (id == 0) {
pdata->reset_bit = AR933X_RESET_GE0_MAC |
AR933X_RESET_GE0_MDIO;
case ATH79_SOC_AR9330:
case ATH79_SOC_AR9331:
case ATH79_SOC_QCA9533:
+ case ATH79_SOC_QCA9561:
+ case ATH79_SOC_TP9343:
pdata->mii_bus_dev = &ath79_mdio1_device.dev;
break;
void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio);
void ath79_setup_ar934x_eth_cfg(u32 mask);
+void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv);
void ath79_setup_qca955x_eth_cfg(u32 mask);
#endif /* _ATH79_DEV_ETH_H */
--- /dev/null
+/*
+ * Bitmain Antminer S1 board support
+ *
+ * Copyright (C) 2015 L. D. Pinney <ldpinney@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+#include "dev-usb.h"
+
+#define ANTMINER_S1_GPIO_BTN_RESET 11
+
+#define ANTMINER_S1_GPIO_LED_SYSTEM 23
+#define ANTMINER_S1_GPIO_LED_WLAN 0
+#define ANTMINER_S1_GPIO_USB_POWER 8
+
+#define ANTMINER_S1_KEYSPOLL_INTERVAL 20 /* msecs */
+#define ANTMINER_S1_KEYSDEBOUNCE_INTERVAL (3 * ANTMINER_S1_KEYSPOLL_INTERVAL)
+
+static const char *ANTMINER_S1_part_probes[] = {
+ "tp-link",
+ NULL,
+};
+
+static struct flash_platform_data ANTMINER_S1_flash_data = {
+ .part_probes = ANTMINER_S1_part_probes,
+};
+
+static struct gpio_led ANTMINER_S1_leds_gpio[] __initdata = {
+ {
+ .name = "bitmain:green:system",
+ .gpio = ANTMINER_S1_GPIO_LED_SYSTEM,
+ .active_low = 0,
+ },{
+ .name = "bitmain:green:wlan",
+ .gpio = ANTMINER_S1_GPIO_LED_WLAN,
+ .active_low = 0,
+ },
+};
+
+static struct gpio_keys_button ANTMINER_S1_GPIO_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = ANTMINER_S1_KEYSDEBOUNCE_INTERVAL,
+ .gpio = ANTMINER_S1_GPIO_BTN_RESET,
+ .active_low = 0,
+ },
+};
+
+static void __init antminer_s1_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */
+ ath79_setup_ar933x_phy4_switch(false, false);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S1_leds_gpio),
+ ANTMINER_S1_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, ANTMINER_S1_KEYSPOLL_INTERVAL,
+ ARRAY_SIZE(ANTMINER_S1_GPIO_keys),
+ ANTMINER_S1_GPIO_keys);
+
+ gpio_request_one(ANTMINER_S1_GPIO_USB_POWER,
+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
+ "USB power");
+ ath79_register_usb();
+
+ ath79_register_m25p80(&ANTMINER_S1_flash_data);
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
+
+ ath79_register_mdio(0, 0x0);
+ ath79_register_eth(0);
+ ath79_register_eth(1);
+
+ ath79_register_wmac(ee, mac);
+}
+
+MIPS_MACHINE(ATH79_MACH_ANTMINER_S1, "ANTMINER-S1",
+ "Bitmain Antminer S1", antminer_s1_setup);
--- /dev/null
+/*
+ * Bitmain Antminer S3 board support
+ *
+ * Copyright (C) 2015 L. D. Pinney <ldpinney@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+#include "dev-usb.h"
+
+#define ANTMINER_S3_GPIO_LED_WLAN 0
+#define ANTMINER_S3_GPIO_LED_SYSTEM 17
+#define ANTMINER_S3_GPIO_LED_LAN 22
+
+#define ANTMINER_S3_GPIO_BTN_RESET 11
+
+#define ANTMINER_S3_KEYSPOLL_INTERVAL 88 /* msecs */
+#define ANTMINER_S3_KEYSDEBOUNCE_INTERVAL (3 * ANTMINER_S3_KEYSPOLL_INTERVAL)
+
+static const char *ANTMINER_S3_part_probes[] = {
+ "tp-link",
+ NULL,
+};
+
+static struct flash_platform_data ANTMINER_S3_flash_data = {
+ .part_probes = ANTMINER_S3_part_probes,
+};
+
+static struct gpio_led ANTMINER_S3_leds_gpio[] __initdata = {
+ {
+ .name = "bitmain:green:wlan",
+ .gpio = ANTMINER_S3_GPIO_LED_WLAN,
+ .active_low = 0,
+ },{
+ .name = "bitmain:green:system",
+ .gpio = ANTMINER_S3_GPIO_LED_SYSTEM,
+ .active_low = 0,
+ },{
+ .name = "bitmain:yellow:lan",
+ .gpio = ANTMINER_S3_GPIO_LED_LAN,
+ .active_low = 0,
+ },
+};
+
+static struct gpio_keys_button ANTMINER_S3_GPIO_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = ANTMINER_S3_KEYSDEBOUNCE_INTERVAL,
+ .gpio = ANTMINER_S3_GPIO_BTN_RESET,
+ .active_low = 0,
+ },
+};
+
+static void __init antminer_s3_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */
+ ath79_setup_ar933x_phy4_switch(false, false);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S3_leds_gpio),
+ ANTMINER_S3_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, ANTMINER_S3_KEYSPOLL_INTERVAL,
+ ARRAY_SIZE(ANTMINER_S3_GPIO_keys),
+ ANTMINER_S3_GPIO_keys);
+ ath79_register_usb();
+
+ ath79_register_m25p80(&ANTMINER_S3_flash_data);
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
+
+ ath79_register_mdio(0, 0x0);
+ ath79_register_eth(0);
+ ath79_register_eth(1);
+
+ ath79_register_wmac(ee, mac);
+}
+
+MIPS_MACHINE(ATH79_MACH_ANTMINER_S3, "ANTMINER-S3",
+ "Bitmain Antminer S3", antminer_s3_setup);
--- /dev/null
+/*
+ * Atheros AP143 reference board support
+ *
+ * Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define AP143_GPIO_LED_WLAN 12
+#define AP143_GPIO_LED_WPS 13
+#define AP143_GPIO_LED_STATUS 13
+
+#define AP143_GPIO_LED_WAN 4
+#define AP143_GPIO_LED_LAN1 16
+#define AP143_GPIO_LED_LAN2 15
+#define AP143_GPIO_LED_LAN3 14
+#define AP143_GPIO_LED_LAN4 11
+
+#define AP143_GPIO_BTN_WPS 17
+
+#define AP143_KEYS_POLL_INTERVAL 20 /* msecs */
+#define AP143_KEYS_DEBOUNCE_INTERVAL (3 * AP143_KEYS_POLL_INTERVAL)
+
+#define AP143_MAC0_OFFSET 0
+#define AP143_MAC1_OFFSET 6
+#define AP143_WMAC_CALDATA_OFFSET 0x1000
+
+static struct gpio_led ap143_leds_gpio[] __initdata = {
+ {
+ .name = "ap143:green:status",
+ .gpio = AP143_GPIO_LED_STATUS,
+ .active_low = 1,
+ },
+ {
+ .name = "ap143:green:wlan",
+ .gpio = AP143_GPIO_LED_WLAN,
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_button ap143_gpio_keys[] __initdata = {
+ {
+ .desc = "WPS button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = AP143_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = AP143_GPIO_BTN_WPS,
+ .active_low = 1,
+ },
+};
+
+static void __init ap143_gpio_led_setup(void)
+{
+ ath79_gpio_direction_select(AP143_GPIO_LED_WAN, true);
+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN1, true);
+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN2, true);
+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN3, true);
+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN4, true);
+
+ ath79_gpio_output_select(AP143_GPIO_LED_WAN,
+ QCA953X_GPIO_OUT_MUX_LED_LINK5);
+ ath79_gpio_output_select(AP143_GPIO_LED_LAN1,
+ QCA953X_GPIO_OUT_MUX_LED_LINK1);
+ ath79_gpio_output_select(AP143_GPIO_LED_LAN2,
+ QCA953X_GPIO_OUT_MUX_LED_LINK2);
+ ath79_gpio_output_select(AP143_GPIO_LED_LAN3,
+ QCA953X_GPIO_OUT_MUX_LED_LINK3);
+ ath79_gpio_output_select(AP143_GPIO_LED_LAN4,
+ QCA953X_GPIO_OUT_MUX_LED_LINK4);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap143_leds_gpio),
+ ap143_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, AP143_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ap143_gpio_keys),
+ ap143_gpio_keys);
+}
+
+static void __init ap143_setup(void)
+{
+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+
+ ap143_gpio_led_setup();
+
+ ath79_register_usb();
+
+ ath79_wmac_set_led_pin(AP143_GPIO_LED_WLAN);
+ ath79_register_wmac(art + AP143_WMAC_CALDATA_OFFSET, NULL);
+
+ ath79_register_mdio(0, 0x0);
+ ath79_register_mdio(1, 0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP143_MAC0_OFFSET, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP143_MAC1_OFFSET, 0);
+
+ /* WAN port */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.speed = SPEED_100;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_eth0_data.phy_mask = BIT(4);
+ ath79_register_eth(0);
+
+ /* LAN ports */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_switch_data.phy_poll_mask |= BIT(4);
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_register_eth(1);
+}
+
+MIPS_MACHINE(ATH79_MACH_AP143, "AP143", "Qualcomm Atheros AP143 reference board",
+ ap143_setup);
--- /dev/null
+/*
+ * Atheros AP147 reference board support
+ *
+ * Copyright (C) 2014 Matthias Schiffer <mschiffer@universe-factory.net>
+ * Copyright (C) 2015 Sven Eckelmann <sven@open-mesh.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include <asm/mach-ath79/ath79.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+#include "pci.h"
+
+#define AP147_GPIO_LED_WAN 4
+#define AP147_GPIO_LED_LAN1 16
+#define AP147_GPIO_LED_LAN2 15
+#define AP147_GPIO_LED_LAN3 14
+#define AP147_GPIO_LED_LAN4 11
+#define AP147_GPIO_LED_STATUS 13
+#define AP147_GPIO_LED_WLAN_2G 12
+
+#define AP147_GPIO_BTN_WPS 17
+
+#define AP147_KEYS_POLL_INTERVAL 20 /* msecs */
+#define AP147_KEYS_DEBOUNCE_INTERVAL (3 * AP147_KEYS_POLL_INTERVAL)
+
+#define AP147_MAC0_OFFSET 0x1000
+
+static struct gpio_led ap147_leds_gpio[] __initdata = {
+ {
+ .name = "ap147:green:status",
+ .gpio = AP147_GPIO_LED_STATUS,
+ .active_low = 1,
+ }, {
+ .name = "ap147:green:wlan-2g",
+ .gpio = AP147_GPIO_LED_WLAN_2G,
+ .active_low = 1,
+ }, {
+ .name = "ap147:green:lan1",
+ .gpio = AP147_GPIO_LED_LAN1,
+ .active_low = 1,
+ }, {
+ .name = "ap147:green:lan2",
+ .gpio = AP147_GPIO_LED_LAN2,
+ .active_low = 1,
+ }, {
+ .name = "ap147:green:lan3",
+ .gpio = AP147_GPIO_LED_LAN3,
+ .active_low = 1,
+ }, {
+ .name = "ap147:green:lan4",
+ .gpio = AP147_GPIO_LED_LAN4,
+ .active_low = 1,
+ }, {
+ .name = "ap147:green:wan",
+ .gpio = AP147_GPIO_LED_WAN,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button ap147_gpio_keys[] __initdata = {
+ {
+ .desc = "wps button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = AP147_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = AP147_GPIO_BTN_WPS,
+ .active_low = 1,
+ }
+};
+
+static void __init ap147_setup(void)
+{
+ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap147_leds_gpio),
+ ap147_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, AP147_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ap147_gpio_keys),
+ ap147_gpio_keys);
+
+ ath79_register_usb();
+
+ ath79_register_pci();
+
+ ath79_register_wmac(art + AP147_MAC0_OFFSET, NULL);
+
+ ath79_setup_ar933x_phy4_switch(false, false);
+
+ ath79_register_mdio(0, 0x0);
+
+ /* LAN */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_switch_data.phy_poll_mask |= BIT(4);
+ ath79_init_mac(ath79_eth1_data.mac_addr, art, 0);
+ ath79_register_eth(1);
+
+ /* WAN */
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_eth0_data.speed = SPEED_100;
+ ath79_eth0_data.phy_mask = BIT(4);
+ ath79_init_mac(ath79_eth0_data.mac_addr, art, 1);
+ ath79_register_eth(0);
+}
+
+MIPS_MACHINE(ATH79_MACH_AP147_010, "AP147-010", "Atheros AP147-010 reference board", ap147_setup);
--- /dev/null
+/*
+ * D-Link DIR-615 rev. I1 board support
+ * Copyright (C) 2013-2015 Jaehoon You <teslamint@gmail.com>
+ *
+ * based on the DIR-600 rev. A1 board support code
+ * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
+ *
+ * based on the TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support code
+ * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define DIR_615_I1_GPIO_LED_WPS 15
+#define DIR_615_I1_GPIO_LED_POWER_AMBER 14
+#define DIR_615_I1_GPIO_LED_POWER_GREEN 4
+#define DIR_615_I1_GPIO_LED_WAN_AMBER 22
+#define DIR_615_I1_GPIO_LED_WAN_GREEN 12
+#define DIR_615_I1_GPIO_LED_WLAN_GREEN 13
+
+#define DIR_615_I1_GPIO_BTN_WPS 16
+#define DIR_615_I1_GPIO_BTN_RESET 17
+
+#define DIR_615_I1_KEYS_POLL_INTERVAL 20 /* msecs */
+#define DIR_615_I1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_I1_KEYS_POLL_INTERVAL)
+
+#define DIR_615_I1_LAN_PHYMASK BIT(0)
+#define DIR_615_I1_WAN_PHYMASK BIT(4)
+#define DIR_615_I1_WLAN_MAC_ADDR 0x1fffffb4
+
+static struct gpio_led dir_615_i1_leds_gpio[] __initdata = {
+ {
+ .name = "d-link:green:power",
+ .gpio = DIR_615_I1_GPIO_LED_POWER_GREEN,
+ }, {
+ .name = "d-link:amber:power",
+ .gpio = DIR_615_I1_GPIO_LED_POWER_AMBER,
+ }, {
+ .name = "d-link:amber:wan",
+ .gpio = DIR_615_I1_GPIO_LED_WAN_AMBER,
+ }, {
+ .name = "d-link:green:wan",
+ .gpio = DIR_615_I1_GPIO_LED_WAN_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "d-link:green:wlan",
+ .gpio = DIR_615_I1_GPIO_LED_WLAN_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "d-link:blue:wps",
+ .gpio = DIR_615_I1_GPIO_LED_WPS,
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_button dir_615_i1_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DIR_615_I1_GPIO_BTN_RESET,
+ .active_low = 1,
+ }, {
+ .desc = "wps",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DIR_615_I1_GPIO_BTN_WPS,
+ .active_low = 1,
+ }
+};
+
+static void __init dir_615_i1_setup(void)
+{
+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
+ u8 mac[ETH_ALEN];
+
+ ath79_register_mdio(0, 0x0);
+ ath79_register_mdio(1, ~(DIR_615_I1_WAN_PHYMASK));
+
+ ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615_I1_WLAN_MAC_ADDR), mac);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
+
+ /* GMAC0 is connected to the PHY0 of the internal switch */
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.phy_mask = DIR_615_I1_WAN_PHYMASK;
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
+
+ /* GMAC1 is connected to the internal switch */
+ ath79_eth1_data.phy_mask = DIR_615_I1_LAN_PHYMASK;
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+
+ ath79_register_eth(0);
+ ath79_register_eth(1);
+
+ ath79_register_m25p80(NULL);
+
+ /* Disable JTAG, enabling GPIOs 0-3 */
+ /* Configure OBS4 line, for GPIO 4*/
+ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
+ AR934X_GPIO_FUNC_CLK_OBS4_EN);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_i1_leds_gpio),
+ dir_615_i1_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, DIR_615_I1_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(dir_615_i1_gpio_keys),
+ dir_615_i1_gpio_keys);
+
+ ath79_register_wmac(eeprom, mac);
+}
+
+MIPS_MACHINE(ATH79_MACH_DIR_615_I1, "DIR-615-I1", "D-Link DIR-615 rev. I1",
+ dir_615_i1_setup);
--- /dev/null
+/*
+ * devolo dLAN pro 500 Wireless+ support
+ *
+ * Copyright (c) 2013-2015 devolo AG
+ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <linux/pci.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-nfc.h"
+#include "dev-spi.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE 13
+#define DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE 21
+#define DLAN_PRO_1200_AC_GPIO_LED_WLAN 12
+#define DLAN_PRO_1200_AC_GPIO_LED_DLAN 14
+#define DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR 15
+
+#define DLAN_PRO_1200_AC_GPIO_BTN_WLAN 20
+#define DLAN_PRO_1200_AC_GPIO_BTN_DLAN 22
+#define DLAN_PRO_1200_AC_GPIO_BTN_RESET 4
+#define DLAN_PRO_1200_AC_GPIO_DLAN_IND 17
+#define DLAN_PRO_1200_AC_GPIO_DLAN_ERR_IND 16
+
+#define DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL 20 /* msecs */
+#define DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL)
+
+#define DLAN_PRO_1200_AC_ART_ADDRESS 0x1fff0000
+#define DLAN_PRO_1200_AC_CALDATA_OFFSET 0x1000
+#define DLAN_PRO_1200_AC_WIFIMAC_OFFSET 0x1002
+#define DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET 0x5000
+
+static struct gpio_led dlan_pro_1200_ac_leds_gpio[] __initdata = {
+ {
+ .name = "devolo:status:wlan",
+ .gpio = DLAN_PRO_1200_AC_GPIO_LED_WLAN,
+ .active_low = 1,
+ },
+ {
+ .name = "devolo:status:dlan",
+ .gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN,
+ .active_low = 1,
+ },
+ {
+ .name = "devolo:error:dlan",
+ .gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR,
+ .active_low = 0,
+ }
+};
+
+static struct gpio_keys_button dlan_pro_1200_ac_gpio_keys[] __initdata = {
+ {
+ .desc = "dLAN button",
+ .type = EV_KEY,
+ .code = BTN_0,
+ .debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DLAN_PRO_1200_AC_GPIO_BTN_DLAN,
+ .active_low = 1,
+ },
+ {
+ .desc = "WLAN button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DLAN_PRO_1200_AC_GPIO_BTN_WLAN,
+ .active_low = 0,
+ },
+ {
+ .desc = "Reset button",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DLAN_PRO_1200_AC_GPIO_BTN_RESET,
+ .active_low = 1,
+ }
+};
+
+static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_MAC_RGMII,
+ .txclk_delay_en = true,
+ .rxclk_delay_en = false,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
+};
+
+static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad5_cfg = {
+ .mode = 0,
+ .txclk_delay_en = 0,
+ .rxclk_delay_en = 0,
+ .txclk_delay_sel = 0,
+ .rxclk_delay_sel = 0,
+};
+
+static struct ar8327_platform_data dlan_pro_1200_ac_ar8327_data = {
+ .pad0_cfg = &dlan_pro_1200_ac_ar8327_pad0_cfg,
+ .pad5_cfg = &dlan_pro_1200_ac_ar8327_pad5_cfg,
+ .port0_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+};
+
+static struct mdio_board_info dlan_pro_1200_ac_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &dlan_pro_1200_ac_ar8327_data,
+ },
+};
+
+static void __init dlan_pro_1200_ac_setup(void)
+{
+ u8 *art = (u8 *) KSEG1ADDR(DLAN_PRO_1200_AC_ART_ADDRESS);
+ u8 *cal = art + DLAN_PRO_1200_AC_CALDATA_OFFSET;
+ u8 *wifi_mac = art + DLAN_PRO_1200_AC_WIFIMAC_OFFSET;
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_pro_1200_ac_leds_gpio),
+ dlan_pro_1200_ac_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(dlan_pro_1200_ac_gpio_keys),
+ dlan_pro_1200_ac_gpio_keys);
+
+ /* dLAN power must be enabled from user-space as soon as the boot-from-host daemon is running */
+ gpio_request_one(DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE,
+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
+ "dLAN power");
+
+ /* WLAN power is turned on initially to allow the PCI bus scan to succeed */
+ gpio_request_one(DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE,
+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
+ "WLAN power");
+
+ ath79_register_wmac(cal, wifi_mac);
+ ap91_pci_init(art + DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET, NULL);
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
+
+ ath79_register_mdio(1, 0x0);
+ ath79_register_mdio(0, 0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 2);
+
+ mdiobus_register_board_info(dlan_pro_1200_ac_mdio0_info,
+ ARRAY_SIZE(dlan_pro_1200_ac_mdio0_info));
+
+ /* GMAC0 is connected to an AR8337 */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = BIT(0);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+ ath79_eth0_pll_data.pll_1000 = 0x02000000;
+ ath79_register_eth(0);
+}
+
+MIPS_MACHINE(ATH79_MACH_DLAN_PRO_1200_AC, "dLAN-pro-1200-ac", "devolo dLAN pro 1200+ WiFi ac",
+ dlan_pro_1200_ac_setup);
--- /dev/null
+/*
+ * devolo dLAN pro 500 Wireless+ support
+ *
+ * Copyright (c) 2013-2015 devolo AG
+ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <linux/pci.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define DLAN_PRO_500_WP_GPIO_DLAN_POWER_ENABLE 13
+#define DLAN_PRO_500_WP_GPIO_DLAN_LED_ENABLE 17
+#define DLAN_PRO_500_WP_GPIO_LED_WLAN_5G 11
+#define DLAN_PRO_500_WP_GPIO_LED_WLAN_2G 12
+#define DLAN_PRO_500_WP_GPIO_LED_STATUS 16
+#define DLAN_PRO_500_WP_GPIO_LED_ETH 14
+
+#define DLAN_PRO_500_WP_GPIO_BTN_WPS 20
+#define DLAN_PRO_500_WP_GPIO_BTN_WLAN 22
+#define DLAN_PRO_500_WP_GPIO_BTN_DLAN 21
+#define DLAN_PRO_500_WP_GPIO_BTN_RESET 4
+
+#define DLAN_PRO_500_WP_KEYS_POLL_INTERVAL 20 /* msecs */
+#define DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_PRO_500_WP_KEYS_POLL_INTERVAL)
+
+#define DLAN_PRO_500_WP_ART_ADDRESS 0x1fff0000
+#define DLAN_PRO_500_WP_CALDATA_OFFSET 0x1000
+#define DLAN_PRO_500_WP_MAC_ADDRESS_OFFSET 0x1002
+#define DLAN_PRO_500_WP_PCIE_CALDATA_OFFSET 0x5000
+
+static struct gpio_led dlan_pro_500_wp_leds_gpio[] __initdata = {
+ {
+ .name = "devolo:green:status",
+ .gpio = DLAN_PRO_500_WP_GPIO_LED_STATUS,
+ .active_low = 1,
+ },
+ {
+ .name = "devolo:green:eth",
+ .gpio = DLAN_PRO_500_WP_GPIO_LED_ETH,
+ .active_low = 1,
+ },
+ {
+ .name = "devolo:blue:wlan-5g",
+ .gpio = DLAN_PRO_500_WP_GPIO_LED_WLAN_5G,
+ .active_low = 1,
+ },
+ {
+ .name = "devolo:green:wlan-2g",
+ .gpio = DLAN_PRO_500_WP_GPIO_LED_WLAN_2G,
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_button dlan_pro_500_wp_gpio_keys[] __initdata = {
+ {
+ .desc = "dLAN button",
+ .type = EV_KEY,
+ .code = BTN_0,
+ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DLAN_PRO_500_WP_GPIO_BTN_DLAN,
+ .active_low = 0,
+ },
+ {
+ .desc = "WPS button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DLAN_PRO_500_WP_GPIO_BTN_WPS,
+ .active_low = 0,
+ },
+ {
+ .desc = "WLAN button",
+ .type = EV_KEY,
+ .code = BTN_2,
+ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DLAN_PRO_500_WP_GPIO_BTN_WLAN,
+ .active_low = 1,
+ },
+ {
+ .desc = "Reset button",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DLAN_PRO_500_WP_GPIO_BTN_RESET,
+ .active_low = 1,
+ }
+};
+
+static struct ar8327_pad_cfg dlan_pro_500_wp_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_PHY_RGMII,
+ .txclk_delay_en = false,
+ .rxclk_delay_en = false,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL0,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
+};
+
+static struct ar8327_led_cfg dlan_pro_500_wp_ar8327_led_cfg = {
+ .led_ctrl0 = 0x00000000,
+ .led_ctrl1 = 0xc737c737,
+ .led_ctrl2 = 0x00000000,
+ .led_ctrl3 = 0x00c30c00,
+ .open_drain = true,
+};
+
+static struct ar8327_platform_data dlan_pro_500_wp_ar8327_data = {
+ .pad0_cfg = &dlan_pro_500_wp_ar8327_pad0_cfg,
+ .port0_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 0,
+ .rxpause = 0,
+ },
+ .led_cfg = &dlan_pro_500_wp_ar8327_led_cfg,
+};
+
+static struct mdio_board_info dlan_pro_500_wp_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &dlan_pro_500_wp_ar8327_data,
+ },
+};
+
+static void __init dlan_pro_500_wp_setup(void)
+{
+ u8 *art = (u8 *) KSEG1ADDR(DLAN_PRO_500_WP_ART_ADDRESS);
+ u8 *cal = art + DLAN_PRO_500_WP_CALDATA_OFFSET;
+ u8 *wifi_mac = art + DLAN_PRO_500_WP_MAC_ADDRESS_OFFSET;
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_pro_500_wp_leds_gpio),
+ dlan_pro_500_wp_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, DLAN_PRO_500_WP_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(dlan_pro_500_wp_gpio_keys),
+ dlan_pro_500_wp_gpio_keys);
+
+ gpio_request_one(DLAN_PRO_500_WP_GPIO_DLAN_POWER_ENABLE,
+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
+ "PLC power");
+ gpio_request_one(DLAN_PRO_500_WP_GPIO_DLAN_LED_ENABLE,
+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
+ "PLC LEDs");
+
+ ath79_register_wmac(cal, wifi_mac);
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
+
+ ath79_register_mdio(1, 0x0);
+ ath79_register_mdio(0, 0x0);
+
+ mdiobus_register_board_info(dlan_pro_500_wp_mdio0_info,
+ ARRAY_SIZE(dlan_pro_500_wp_mdio0_info));
+
+ /* GMAC0 is connected to a AR7400 PLC in PHY mode */
+ ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 2);
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_pll_data.pll_1000 = 0x0e000000;
+ ath79_eth0_data.speed = SPEED_1000;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_register_eth(0);
+
+ /* GMAC1 is connected to the internal switch */
+ ath79_init_mac(ath79_eth1_data.mac_addr, wifi_mac, 1);
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_register_eth(1);
+}
+
+MIPS_MACHINE(ATH79_MACH_DLAN_PRO_500_WP, "dLAN-pro-500-wp", "devolo dLAN pro 500 Wireless+",
+ dlan_pro_500_wp_setup);
--- /dev/null
+/*
+ * EnGenius EPG5000 board support
+ *
+ * Copyright (c) 2014 Jon Suphammer <jon@suphammer.net>
+ * Copyright (c) 2015 Christian Beier <cb@shoutrlabs.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "pci.h"
+#include "dev-ap9x-pci.h"
+#include "dev-gpio-buttons.h"
+#include "dev-eth.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+#include "nvram.h"
+
+#define EPG5000_GPIO_LED_WLAN_5G 23
+#define EPG5000_GPIO_LED_WLAN_2G 13
+#define EPG5000_GPIO_LED_POWER_AMBER 2
+#define EPG5000_GPIO_LED_WPS_AMBER 22
+#define EPG5000_GPIO_LED_WPS_BLUE 19
+
+#define EPG5000_GPIO_BTN_WPS 16
+#define EPG5000_GPIO_BTN_RESET 17
+
+#define EPG5000_KEYS_POLL_INTERVAL 20 /* msecs */
+#define EPG5000_KEYS_DEBOUNCE_INTERVAL (3 * EPG5000_KEYS_POLL_INTERVAL)
+
+#define EPG5000_CALDATA_ADDR 0x1fff0000
+#define EPG5000_WMAC_CALDATA_OFFSET 0x1000
+#define EPG5000_PCIE_CALDATA_OFFSET 0x5000
+
+#define EPG5000_NVRAM_ADDR 0x1f030000
+#define EPG5000_NVRAM_SIZE 0x10000
+
+static struct gpio_led epg5000_leds_gpio[] __initdata = {
+ {
+ .name = "epg5000:amber:power",
+ .gpio = EPG5000_GPIO_LED_POWER_AMBER,
+ .active_low = 1,
+ },
+ {
+ .name = "epg5000:blue:wps",
+ .gpio = EPG5000_GPIO_LED_WPS_BLUE,
+ .active_low = 1,
+ },
+ {
+ .name = "epg5000:amber:wps",
+ .gpio = EPG5000_GPIO_LED_WPS_AMBER,
+ .active_low = 1,
+ },
+ {
+ .name = "epg5000:blue:wlan-2g",
+ .gpio = EPG5000_GPIO_LED_WLAN_2G,
+ .active_low = 1,
+ },
+ {
+ .name = "epg5000:blue:wlan-5g",
+ .gpio = EPG5000_GPIO_LED_WLAN_5G,
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_button epg5000_gpio_keys[] __initdata = {
+ {
+ .desc = "WPS button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = EPG5000_GPIO_BTN_WPS,
+ .active_low = 1,
+ },
+ {
+ .desc = "Reset button",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = EPG5000_GPIO_BTN_RESET,
+ .active_low = 1,
+ },
+};
+
+static struct ar8327_pad_cfg epg5000_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_MAC_RGMII,
+ .txclk_delay_en = true,
+ .rxclk_delay_en = true,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+ .mac06_exchange_en = true,
+};
+
+static struct ar8327_platform_data epg5000_ar8327_data = {
+ .pad0_cfg = &epg5000_ar8327_pad0_cfg,
+ .port0_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+};
+
+static struct mdio_board_info epg5000_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &epg5000_ar8327_data,
+ },
+};
+
+static int epg5000_get_mac(const char *name, char *mac)
+{
+ u8 *nvram = (u8 *) KSEG1ADDR(EPG5000_NVRAM_ADDR);
+ int err;
+
+ err = ath79_nvram_parse_mac_addr(nvram, EPG5000_NVRAM_SIZE,
+ name, mac);
+ if (err) {
+ pr_err("no MAC address found for %s\n", name);
+ return false;
+ }
+
+ return true;
+}
+
+static void __init epg5000_setup(void)
+{
+ u8 *caldata = (u8 *) KSEG1ADDR(EPG5000_CALDATA_ADDR);
+ u8 mac1[ETH_ALEN];
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(epg5000_leds_gpio),
+ epg5000_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, EPG5000_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(epg5000_gpio_keys),
+ epg5000_gpio_keys);
+
+ ath79_register_usb();
+
+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+
+ ath79_register_mdio(0, 0x0);
+
+ mdiobus_register_board_info(epg5000_mdio0_info,
+ ARRAY_SIZE(epg5000_mdio0_info));
+
+ /* GMAC0 is connected to an QCA8327N switch */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = BIT(0);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+
+ if (epg5000_get_mac("ethaddr=", mac1))
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
+
+ ath79_eth0_pll_data.pll_1000 = 0xa6000000;
+ ath79_register_eth(0);
+
+ ath79_register_wmac(caldata + EPG5000_WMAC_CALDATA_OFFSET, mac1);
+
+ ath79_register_pci();
+}
+
+MIPS_MACHINE(ATH79_MACH_EPG5000, "EPG5000",
+ "EnGenius EPG5000",
+ epg5000_setup);
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL2,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+ .mac06_exchange_en = true,
};
static struct ar8327_platform_data esr1750_ar8327_data = {
* EW Dorin board support
* (based on Atheros Ref. Design AP121)
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
- * Copyright (C) 2012 Embedded Wireless GmbH www.80211.de
+ * Copyright (C) 2012-2015 Embedded Wireless GmbH www.80211.de
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
#define DORIN_GPIO_LED_21 21
#define DORIN_GPIO_LED_22 22
+#define DORIN_GPIO_LED_STATUS 23
#define DORIN_GPIO_BTN_JUMPSTART 11
#define DORIN_GPIO_BTN_RESET 6
.gpio = DORIN_GPIO_LED_22,
.active_low = 1,
},
+ {
+ .name = "dorin:green:status",
+ .gpio = DORIN_GPIO_LED_STATUS,
+ .active_low = 1,
+ },
};
static struct gpio_keys_button dorin_gpio_keys[] __initdata = {
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+ .mac06_exchange_en = true,
};
static struct ar8327_pad_cfg f9k1115v2_ar8327_pad6_cfg = {
--- /dev/null
+/*
+ * Cisco Meraki MR12 board support
+ *
+ * Copyright (C) 2014-2015 Chris Blake <chrisrblake93@gmail.com>
+ *
+ * Based on Atheros AP96 board support configuration
+ *
+ * Copyright (C) 2009 Marco Porsch
+ * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2010 Atheros Communications
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+
+#include <asm/mach-ath79/ath79.h>
+
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "machtypes.h"
+
+#define MR12_GPIO_LED_W4_GREEN 14
+#define MR12_GPIO_LED_W3_GREEN 13
+#define MR12_GPIO_LED_W2_GREEN 12
+#define MR12_GPIO_LED_W1_GREEN 11
+
+#define MR12_GPIO_LED_WAN 15
+
+#define MR12_GPIO_LED_POWER_ORANGE 16
+#define MR12_GPIO_LED_POWER_GREEN 17
+
+#define MR12_GPIO_BTN_RESET 8
+#define MR12_KEYS_POLL_INTERVAL 20 /* msecs */
+#define MR12_KEYS_DEBOUNCE_INTERVAL (3 * MR12_KEYS_POLL_INTERVAL)
+
+#define MR12_WAN_PHYMASK BIT(4)
+
+#define MR12_WMAC0_MAC_OFFSET 0x120c
+#define MR12_CALDATA0_OFFSET 0x1000
+
+static struct gpio_led MR12_leds_gpio[] __initdata = {
+ {
+ .name = "mr12:green:wan",
+ .gpio = MR12_GPIO_LED_WAN,
+ .active_low = 1,
+ }, {
+ .name = "mr12:orange:power",
+ .gpio = MR12_GPIO_LED_POWER_ORANGE,
+ .active_low = 1,
+ }, {
+ .name = "mr12:green:power",
+ .gpio = MR12_GPIO_LED_POWER_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "mr12:green:wifi4",
+ .gpio = MR12_GPIO_LED_W4_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "mr12:green:wifi3",
+ .gpio = MR12_GPIO_LED_W3_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "mr12:green:wifi2",
+ .gpio = MR12_GPIO_LED_W2_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "mr12:green:wifi1",
+ .gpio = MR12_GPIO_LED_W1_GREEN,
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_button MR12_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = MR12_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = MR12_GPIO_BTN_RESET,
+ .active_low = 1,
+ }
+};
+
+static void __init MR12_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0xbfff0000);
+
+ ath79_register_mdio(0,0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = MR12_WAN_PHYMASK;
+ ath79_register_eth(0);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(MR12_leds_gpio),
+ MR12_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, MR12_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(MR12_gpio_keys),
+ MR12_gpio_keys);
+
+ ap91_pci_init(mac + MR12_CALDATA0_OFFSET,
+ mac + MR12_WMAC0_MAC_OFFSET);
+
+}
+
+MIPS_MACHINE(ATH79_MACH_MR12, "MR12", "Meraki MR12", MR12_setup);
\ No newline at end of file
--- /dev/null
+/*
+ * Cisco Meraki MR16 board support
+ *
+ * Copyright (C) 2015 Chris Blake <chrisrblake93@gmail.com>
+ *
+ * Based on Atheros AP96 board support configuration
+ *
+ * Copyright (C) 2009 Marco Porsch
+ * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2010 Atheros Communications
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+
+#include <asm/mach-ath79/ath79.h>
+
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "machtypes.h"
+
+#define MR16_GPIO_LED_W4_GREEN 3
+#define MR16_GPIO_LED_W3_GREEN 2
+#define MR16_GPIO_LED_W2_GREEN 1
+#define MR16_GPIO_LED_W1_GREEN 0
+
+#define MR16_GPIO_LED_WAN 4
+
+#define MR16_GPIO_LED_POWER_ORANGE 5
+#define MR16_GPIO_LED_POWER_GREEN 6
+
+#define MR16_GPIO_BTN_RESET 7
+#define MR16_KEYS_POLL_INTERVAL 20 /* msecs */
+#define MR16_KEYS_DEBOUNCE_INTERVAL (3 * MR16_KEYS_POLL_INTERVAL)
+
+#define MR16_WAN_PHYMASK BIT(0)
+
+#define MR16_WMAC0_MAC_OFFSET 0x120c
+#define MR16_WMAC1_MAC_OFFSET 0x520c
+#define MR16_CALDATA0_OFFSET 0x1000
+#define MR16_CALDATA1_OFFSET 0x5000
+
+static struct gpio_led MR16_leds_gpio[] __initdata = {
+ {
+ .name = "mr16:green:wan",
+ .gpio = MR16_GPIO_LED_WAN,
+ .active_low = 1,
+ }, {
+ .name = "mr16:orange:power",
+ .gpio = MR16_GPIO_LED_POWER_ORANGE,
+ .active_low = 1,
+ }, {
+ .name = "mr16:green:power",
+ .gpio = MR16_GPIO_LED_POWER_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "mr16:green:wifi4",
+ .gpio = MR16_GPIO_LED_W4_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "mr16:green:wifi3",
+ .gpio = MR16_GPIO_LED_W3_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "mr16:green:wifi2",
+ .gpio = MR16_GPIO_LED_W2_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "mr16:green:wifi1",
+ .gpio = MR16_GPIO_LED_W1_GREEN,
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_button MR16_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = MR16_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = MR16_GPIO_BTN_RESET,
+ .active_low = 1,
+ }
+};
+
+static void __init MR16_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0xbfff0000);
+
+ ath79_register_mdio(0,0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = MR16_WAN_PHYMASK;
+ ath79_register_eth(0);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(MR16_leds_gpio),
+ MR16_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, MR16_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(MR16_gpio_keys),
+ MR16_gpio_keys);
+
+ ap94_pci_init(mac + MR16_CALDATA0_OFFSET,
+ mac + MR16_WMAC0_MAC_OFFSET,
+ mac + MR16_CALDATA1_OFFSET,
+ mac + MR16_WMAC1_MAC_OFFSET);
+}
+
+MIPS_MACHINE(ATH79_MACH_MR16, "MR16", "Meraki MR16", MR16_setup);
\ No newline at end of file
},
};
-
-static void __init mr900_gmac_setup(void)
-{
- void __iomem *base;
- u32 t;
-
- base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
-
- t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG);
-
- t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII);
- t |= QCA955X_ETH_CFG_RGMII_EN;
-
- __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
-
- iounmap(base);
-}
-
static void __init mr900_setup(void)
{
u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
}
pdata->use_eeprom = true;
- mr900_gmac_setup();
-
+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + MR900_MAC0_OFFSET, 0);
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
+#include <linux/platform_data/phy-at803x.h>
#include <asm/mach-ath79/ar71xx_regs.h>
},
};
+static struct at803x_platform_data mynet_rext_at803x_data = {
+ .disable_smarteee = 0,
+ .enable_rgmii_rx_delay = 1,
+ .enable_rgmii_tx_delay = 0,
+ .fixup_rgmii_tx_delay = 1,
+};
+
+static struct mdio_board_info mynet_rext_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 4,
+ .platform_data = &mynet_rext_at803x_data,
+ },
+};
+
static void mynet_rext_get_mac(const char *name, char *mac)
{
u8 *nvram = (u8 *) KSEG1ADDR(MYNET_REXT_NVRAM_ADDR);
ath79_register_mdio(0, 0x0);
+ mdiobus_register_board_info(mynet_rext_mdio0_info,
+ ARRAY_SIZE(mynet_rext_mdio0_info));
+
/* LAN */
mynet_rext_get_mac("et0macaddr=", ath79_eth0_data.mac_addr);
/* GMAC0 is connected to an external PHY on Port 4 */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(4);
+ ath79_eth0_pll_data.pll_10 = 0x00001313; /* athrs_mac.c */
ath79_eth0_pll_data.pll_1000 = 0x0e000000; /* athrs_mac.c */
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
nbg6716_ar8327_pad0_cfg.rxclk_delay_en = true;
nbg6716_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
nbg6716_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
+ nbg6716_ar8327_pad0_cfg.mac06_exchange_en = true;
/* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
nbg6716_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
ath79_init_mac(mac, art, 0x02);
ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac);
- ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
- AR934X_ETH_CFG_RXD_DELAY |
- AR934X_ETH_CFG_RDV_DELAY);
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
+ ath79_setup_ar934x_eth_rx_delay(2, 2);
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, 0x0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_data.phy_mask = BIT(7);
- ath79_eth0_pll_data.pll_1000 = 0x1a000000;
+ ath79_eth0_pll_data.pll_1000 = 0x02000000;
ath79_eth0_pll_data.pll_100 = 0x00000101;
ath79_eth0_pll_data.pll_10 = 0x00001313;
ath79_register_eth(0);
--- /dev/null
+/*
+ * Onion Omega board support
+ *
+ * Copyright (C) 2015 Boken Lin <bl@onion.io>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+
+#include <asm/mach-ath79/ath79.h>
+
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define OMEGA_GPIO_LED_SYSTEM 27
+#define OMEGA_GPIO_BTN_RESET 11
+
+#define OMEGA_GPIO_USB_POWER 8
+
+#define OMEGA_KEYS_POLL_INTERVAL 20 /* msecs */
+#define OMEGA_KEYS_DEBOUNCE_INTERVAL (3 * OMEGA_KEYS_POLL_INTERVAL)
+
+static const char *omega_part_probes[] = {
+ "tp-link",
+ NULL,
+};
+
+static struct flash_platform_data omega_flash_data = {
+ .part_probes = omega_part_probes,
+};
+
+static struct gpio_led omega_leds_gpio[] __initdata = {
+ {
+ .name = "onion:amber:system",
+ .gpio = OMEGA_GPIO_LED_SYSTEM,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button omega_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = OMEGA_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = OMEGA_GPIO_BTN_RESET,
+ .active_low = 0,
+ }
+};
+
+static void __init onion_omega_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ ath79_register_m25p80(&omega_flash_data);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(omega_leds_gpio),
+ omega_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, OMEGA_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(omega_gpio_keys),
+ omega_gpio_keys);
+
+ gpio_request_one(OMEGA_GPIO_USB_POWER,
+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
+ "USB power");
+ ath79_register_usb();
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1);
+
+ ath79_register_mdio(0, 0x0);
+ ath79_register_eth(0);
+
+ ath79_register_wmac(ee, mac);
+}
+
+MIPS_MACHINE(ATH79_MACH_ONION_OMEGA, "ONION-OMEGA", "Onion Omega", onion_omega_setup);
ath79_register_wmac(ee, mac);
}
-MIPS_MACHINE(ATH79_MACH_TL_WR720N_V3, "TL-WR720N-v3", "TP-LINK TL-WR720N v3",
+MIPS_MACHINE(ATH79_MACH_TL_WR720N_V3, "TL-WR720N-v3", "TP-LINK TL-WR720N v3/v4",
tl_wr720n_v3_setup);
-
ath79_register_mdio(0, 0x0);
/* LAN */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_switch_data.phy_poll_mask |= BIT(4);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
/* WAN */
ath79_switch_data.phy4_mii_en = 1;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_eth0_data.speed = SPEED_100;
+ ath79_eth0_data.phy_mask = BIT(4);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
wlr8100_ar8327_pad0_cfg.rxclk_delay_en = true;
wlr8100_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
wlr8100_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
+ wlr8100_ar8327_pad0_cfg.mac06_exchange_en = true;
/* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
wlr8100_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
/*
* NETGEAR WNR2000v4 board support
*
- * Copytight (C) 2014 Michaël Burtin <mburtin@gmail.com>
- * Copytight (C) 2013 Mathieu Olivari <mathieu.olivari@gmail.com>
+ * Copyright (C) 2015 Michael Bazzinotti <mbazzinotti@gmail.com>
+ * Copyright (C) 2014 Michaël Burtin <mburtin@gmail.com>
+ * Copyright (C) 2013 Mathieu Olivari <mathieu.olivari@gmail.com>
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
* Copyright (C) 2008-2009 Andy Boyett <agb@openwrt.org>
#include "machtypes.h"
/* AR9341 GPIOs */
-#define WNR2000V4_GPIO_LED_WAN_AMBER 22
-#define WNR2000V4_GPIO_LED_WAN_GREEN 17
-#define WNR2000V4_GPIO_LED_WPS 2
-#define WNR2000V4_GPIO_LED_WLAN 12
-#define WNR2000V4_GPIO_LED_LAN1 18
-#define WNR2000V4_GPIO_LED_LAN2 19
-#define WNR2000V4_GPIO_LED_LAN3 20
-#define WNR2000V4_GPIO_LED_LAN4 21
-#define STATUS_LED_GPIO 1
-#define WNR2000V4_GPIO_LED_PWR_GREEN 0
-
-#define WNR2000V4_GPIO_BTN_WPS 3
-#define WNR2000V4_GPIO_BTN_RESET 4
-#define WNR2000V4_GPIO_BTN_WLAN 11
-
-#define WNR2000V4_KEYS_POLL_INTERVAL 20 /* msecs */
-#define WNR2000V4_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000V4_KEYS_POLL_INTERVAL)
-
-#define WNR2000V4_MAC0_OFFSET 0
-#define WNR2000V4_MAC1_OFFSET 6
+#define WNR2000V4_GPIO_LED_PWR_GREEN 0
+#define WNR2000V4_GPIO_LED_PWR_AMBER 1
+#define WNR2000V4_GPIO_LED_WPS 2
+#define WNR2000V4_GPIO_LED_WLAN 12
+#define WNR2000V4_GPIO_LED_LAN1_GREEN 13
+#define WNR2000V4_GPIO_LED_LAN2_GREEN 14
+#define WNR2000V4_GPIO_LED_LAN3_GREEN 15
+#define WNR2000V4_GPIO_LED_LAN4_GREEN 16
+#define WNR2000V4_GPIO_LED_LAN1_AMBER 18
+#define WNR2000V4_GPIO_LED_LAN2_AMBER 19
+#define WNR2000V4_GPIO_LED_LAN3_AMBER 20
+#define WNR2000V4_GPIO_LED_LAN4_AMBER 21
+#define WNR2000V4_GPIO_LED_WAN_GREEN 17
+#define WNR2000V4_GPIO_LED_WAN_AMBER 22
+/* Buttons */
+#define WNR2000V4_GPIO_BTN_WPS 3
+#define WNR2000V4_GPIO_BTN_RESET 4
+#define WNR2000V4_GPIO_BTN_WLAN 11
+#define WNR2000V4_KEYS_POLL_INTERVAL 20 /* msecs */
+#define WNR2000V4_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000V4_KEYS_POLL_INTERVAL)
+
+
+/* ART offsets */
+#define WNR2000V4_MAC0_OFFSET 0 /* WAN/WLAN0 MAC */
+#define WNR2000V4_MAC1_OFFSET 6 /* Eth-switch0 MAC */
static struct gpio_led wnr2000v4_leds_gpio[] __initdata = {
{
- .name = "wnr2000-v4:green:power",
+ .name = "netgear:green:power",
.gpio = WNR2000V4_GPIO_LED_PWR_GREEN,
.active_low = 1,
- .default_trigger = "default-on",
- }, {
- .name = "wnr2000-v4:green:wan",
- .gpio = WNR2000V4_GPIO_LED_WAN_AMBER,
+ .default_trigger = "default-on",
+ },
+ {
+ .name = "netgear:amber:status",
+ .gpio = WNR2000V4_GPIO_LED_PWR_AMBER,
.active_low = 1,
},
{
- .name = "wnr2000-v4:green:wps",
- .gpio = WNR2000V4_GPIO_LED_WPS,
+ .name = "netgear:green:wan",
+ .gpio = WNR2000V4_GPIO_LED_WAN_GREEN,
.active_low = 1,
},
{
- .name = "wnr2000-v4:amber:status",
- .gpio = STATUS_LED_GPIO,
+ .name = "netgear:amber:wan",
+ .gpio = WNR2000V4_GPIO_LED_WAN_AMBER,
.active_low = 1,
},
{
- .name = "wnr2000-v4:blue:wlan",
+ .name = "netgear:blue:wlan",
.gpio = WNR2000V4_GPIO_LED_WLAN,
.active_low = 1,
},
+ /* LAN LEDS */
+ {
+ .name = "netgear:green:lan1",
+ .gpio = WNR2000V4_GPIO_LED_LAN1_GREEN,
+ .active_low = 1,
+ },
{
- .name = "wnr2000-v4:amber:lan1",
- .gpio = WNR2000V4_GPIO_LED_LAN1,
+ .name = "netgear:green:lan2",
+ .gpio = WNR2000V4_GPIO_LED_LAN2_GREEN,
.active_low = 1,
- }, {
- .name = "wnr2000-v4:amber:lan2",
- .gpio = WNR2000V4_GPIO_LED_LAN2,
+ },
+ {
+ .name = "netgear:green:lan3",
+ .gpio = WNR2000V4_GPIO_LED_LAN3_GREEN,
.active_low = 1,
- }, {
- .name = "wnr2000-v4:amber:lan3",
- .gpio = WNR2000V4_GPIO_LED_LAN3,
+ },
+ {
+ .name = "netgear:green:lan4",
+ .gpio = WNR2000V4_GPIO_LED_LAN4_GREEN,
+ .active_low = 1,
+ },
+ {
+ .name = "netgear:amber:lan1",
+ .gpio = WNR2000V4_GPIO_LED_LAN1_AMBER,
+ .active_low = 1,
+ },
+ {
+ .name = "netgear:amber:lan2",
+ .gpio = WNR2000V4_GPIO_LED_LAN2_AMBER,
+ .active_low = 1,
+ },
+ {
+ .name = "netgear:amber:lan3",
+ .gpio = WNR2000V4_GPIO_LED_LAN3_AMBER,
+ .active_low = 1,
+ },
+ {
+ .name = "netgear:amber:lan4",
+ .gpio = WNR2000V4_GPIO_LED_LAN4_AMBER,
.active_low = 1,
- }, {
- .name = "wnr2000-v4:amber:lan4",
- .gpio = WNR2000V4_GPIO_LED_LAN4,
+ },
+ {
+ .name = "netgear:green:wps",
+ .gpio = WNR2000V4_GPIO_LED_WPS,
.active_low = 1,
- }
+ },
};
static struct gpio_keys_button wnr2000v4_gpio_keys[] __initdata = {
.code = KEY_WPS_BUTTON,
.debounce_interval = WNR2000V4_KEYS_DEBOUNCE_INTERVAL,
.gpio = WNR2000V4_GPIO_BTN_WPS,
+ .active_low = 1,
},
{
.desc = "Reset button",
.code = KEY_RESTART,
.debounce_interval = WNR2000V4_KEYS_DEBOUNCE_INTERVAL,
.gpio = WNR2000V4_GPIO_BTN_RESET,
+ .active_low = 1,
},
{
.desc = "WLAN button",
.type = EV_KEY,
- .code = KEY_WLAN,
+ .code = KEY_RFKILL,
.debounce_interval = WNR2000V4_KEYS_DEBOUNCE_INTERVAL,
.gpio = WNR2000V4_GPIO_BTN_WLAN,
+ .active_low = 1,
},
};
static void __init wnr_common_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
- u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
-
- ath79_register_m25p80(NULL);
-
- ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE |
- AR934X_ETH_CFG_SW_PHY_SWAP);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_mdio(1, 0x0);
- /* LAN */
- ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2000V4_MAC0_OFFSET, 0);
+ ath79_register_usb();
- /* GMAC1 is connected to the internal switch */
- ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
- ath79_register_eth(1);
+ ath79_register_m25p80(NULL);
- /* WAN */
- ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2000V4_MAC1_OFFSET, 0);
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
- /* GMAC0 is connected to the PHY0 of the internal switch */
+ ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2000V4_MAC0_OFFSET, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2000V4_MAC1_OFFSET, 0);
+
+ /* GMAC0 is connected to the PHY0 of the internal switch, GE0 */
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(4);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
-
- ath79_eth0_data.speed = SPEED_100;
- ath79_eth0_data.duplex = DUPLEX_FULL;
-
ath79_register_eth(0);
- /* WLAN */
- ath79_register_wmac(ee, art+WNR2000V4_MAC0_OFFSET);
+ /* GMAC1 is connected to the internal switch, GE1 */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_register_eth(1);
- /* USB */
- ath79_register_usb();
+ ath79_register_wmac(ee, art);
}
static void __init wnr2000v4_setup(void)
{
+ int i;
+
wnr_common_setup();
+ /* Ensure no LED has an internal MUX signal, otherwise
+ control of LED could be lost... This is especially important
+ for most green LEDS (Eth,WAN).. who arrive in this function with
+ MUX signals set. */
+ for (i = 0; i < ARRAY_SIZE(wnr2000v4_leds_gpio); i++)
+ ath79_gpio_output_select(wnr2000v4_leds_gpio[i].gpio,
+ AR934X_GPIO_OUT_GPIO);
+
ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000v4_leds_gpio),
wnr2000v4_leds_gpio);
* by the Free Software Foundation.
*/
-#include<asm/mach-ath79/ath79.h>
+#include
<asm/mach-ath79/ath79.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
--- /dev/null
+/*
+ * Compex WPJ344 board support
+ *
+ * Copyright (c) 2011 Qualcomm Atheros
+ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "pci.h"
+#include "dev-ap9x-pci.h"
+#include "dev-gpio-buttons.h"
+#include "dev-eth.h"
+#include "dev-usb.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define WPJ344_GPIO_LED_SIG1 15
+#define WPJ344_GPIO_LED_SIG2 20
+#define WPJ344_GPIO_LED_SIG3 21
+#define WPJ344_GPIO_LED_SIG4 22
+#define WPJ344_GPIO_LED_STATUS 14
+
+#define WPJ344_GPIO_BTN_RESET 12
+
+#define WPJ344_KEYS_POLL_INTERVAL 20 /* msecs */
+#define WPJ344_KEYS_DEBOUNCE_INTERVAL (3 * WPJ344_KEYS_POLL_INTERVAL)
+
+#define WPJ344_MAC0_OFFSET 0
+#define WPJ344_MAC1_OFFSET 6
+#define WPJ344_WMAC_CALDATA_OFFSET 0x1000
+#define WPJ344_PCIE_CALDATA_OFFSET 0x5000
+
+static struct gpio_led wpj344_leds_gpio[] __initdata = {
+ {
+ .name = "wpj344:green:status",
+ .gpio = WPJ344_GPIO_LED_STATUS,
+ .active_low = 1,
+ },
+ {
+ .name = "wpj344:red:sig1",
+ .gpio = WPJ344_GPIO_LED_SIG1,
+ .active_low = 1,
+ },
+ {
+ .name = "wpj344:yellow:sig2",
+ .gpio = WPJ344_GPIO_LED_SIG2,
+ .active_low = 1,
+ },
+ {
+ .name = "wpj344:green:sig3",
+ .gpio = WPJ344_GPIO_LED_SIG3,
+ .active_low = 1,
+ },
+ {
+ .name = "wpj344:green:sig4",
+ .gpio = WPJ344_GPIO_LED_SIG4,
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_button wpj344_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = WPJ344_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = WPJ344_GPIO_BTN_RESET,
+ .active_low = 1,
+ },
+};
+
+static struct ar8327_pad_cfg wpj344_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_MAC_RGMII,
+ .txclk_delay_en = true,
+ .rxclk_delay_en = true,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+};
+
+static struct ar8327_led_cfg wpj344_ar8327_led_cfg = {
+ .led_ctrl0 = 0x00000000,
+ .led_ctrl1 = 0xc737c737,
+ .led_ctrl2 = 0x00000000,
+ .led_ctrl3 = 0x00c30c00,
+ .open_drain = true,
+};
+
+static struct ar8327_platform_data wpj344_ar8327_data = {
+ .pad0_cfg = &wpj344_ar8327_pad0_cfg,
+ .port0_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+ .led_cfg = &wpj344_ar8327_led_cfg,
+};
+
+static struct mdio_board_info wpj344_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &wpj344_ar8327_data,
+ },
+};
+
+static void __init wpj344_setup(void)
+{
+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wpj344_leds_gpio),
+ wpj344_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, WPJ344_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(wpj344_gpio_keys),
+ wpj344_gpio_keys);
+
+ ath79_register_usb();
+
+ ath79_register_wmac(art + WPJ344_WMAC_CALDATA_OFFSET, NULL);
+
+ ath79_register_pci();
+
+ mdiobus_register_board_info(wpj344_mdio0_info,
+ ARRAY_SIZE(wpj344_mdio0_info));
+
+ ath79_register_mdio(1, 0x0);
+ ath79_register_mdio(0, 0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, art + WPJ344_MAC0_OFFSET, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, art + WPJ344_MAC1_OFFSET, 0);
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
+ AR934X_ETH_CFG_SW_ONLY_MODE);
+
+ /* GMAC0 is connected to an AR8327 switch */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = BIT(0);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+ ath79_eth0_pll_data.pll_1000 = 0x06000000;
+
+ /* GMAC1 is connected to the internal switch */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+
+ ath79_register_eth(0);
+ ath79_register_eth(1);
+}
+
+MIPS_MACHINE(ATH79_MACH_WPJ344, "WPJ344", "Compex WPJ344", wpj344_setup);
--- /dev/null
+/*
+ * Compex WPJ531 board support
+ *
+ * Copyright (c) 2012 Qualcomm Atheros
+ * Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "pci.h"
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-gpio-buttons.h"
+#include "dev-eth.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define WPJ531_GPIO_LED_SIG1 14
+#define WPJ531_GPIO_LED_SIG2 15
+#define WPJ531_GPIO_LED_SIG3 22
+#define WPJ531_GPIO_LED_SIG4 23
+#define WPJ531_GPIO_BUZZER 4
+
+#define WPJ531_GPIO_BTN_RESET 17
+
+#define WPJ531_KEYS_POLL_INTERVAL 20 /* msecs */
+#define WPJ531_KEYS_DEBOUNCE_INTERVAL (3 * WPJ531_KEYS_POLL_INTERVAL)
+
+#define WPJ531_MAC0_OFFSET 0x10
+#define WPJ531_MAC1_OFFSET 0x18
+#define WPJ531_WMAC_CALDATA_OFFSET 0x1000
+#define WPJ531_PCIE_CALDATA_OFFSET 0x5000
+
+#define WPJ531_ART_SIZE 0x8000
+
+static struct gpio_led wpj531_leds_gpio[] __initdata = {
+ {
+ .name = "wpj531:red:sig1",
+ .gpio = WPJ531_GPIO_LED_SIG1,
+ .active_low = 1,
+ },
+ {
+ .name = "wpj531:yellow:sig2",
+ .gpio = WPJ531_GPIO_LED_SIG2,
+ .active_low = 1,
+ },
+ {
+ .name = "wpj531:green:sig3",
+ .gpio = WPJ531_GPIO_LED_SIG3,
+ .active_low = 1,
+ },
+ {
+ .name = "wpj531:green:sig4",
+ .gpio = WPJ531_GPIO_LED_SIG4,
+ .active_low = 1,
+ },
+ {
+ .name = "wpj531:buzzer",
+ .gpio = WPJ531_GPIO_BUZZER,
+ .active_low = 0,
+ }
+};
+
+static struct gpio_keys_button wpj531_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = WPJ531_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = WPJ531_GPIO_BTN_RESET,
+ .active_low = 1,
+ },
+};
+
+static void __init common_setup(void)
+{
+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f02e000);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_setup_ar933x_phy4_switch(false, false);
+
+ ath79_register_mdio(0, 0x0);
+
+ /* LAN */
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.speed = SPEED_100;
+ ath79_eth0_data.phy_mask = BIT(4);
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac + WPJ531_MAC0_OFFSET, 0);
+ ath79_register_eth(0);
+
+ /* WAN */
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_switch_data.phy_poll_mask |= BIT(4);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac + WPJ531_MAC1_OFFSET, 0);
+ ath79_register_eth(1);
+
+ ath79_register_wmac(art + WPJ531_WMAC_CALDATA_OFFSET, NULL);
+
+ ath79_register_pci();
+ ath79_register_usb();
+}
+
+static void __init wpj531_setup(void)
+{
+ common_setup();
+
+ ath79_register_leds_gpio(-1,
+ ARRAY_SIZE(wpj531_leds_gpio),
+ wpj531_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1,
+ WPJ531_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(wpj531_gpio_keys),
+ wpj531_gpio_keys);
+}
+
+MIPS_MACHINE(ATH79_MACH_WPJ531, "WPJ531", "Compex WPJ531", wpj531_setup);
case ATH79_SOC_AR7242:
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff);
break;
+ case ATH79_SOC_AR9344:
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff);
+ break;
default:
BUG();
}
init_waitqueue_head(&nfc->irq_waitq);
- ret = request_irq(nfc->irq, ar934x_nfc_irq_handler, IRQF_DISABLED,
+ ret = request_irq(nfc->irq, ar934x_nfc_irq_handler, 0,
dev_name(&pdev->dev), nfc);
if (ret) {
dev_err(&pdev->dev, "requast_irq failed, err:%d\n", ret);
nand->ecc.mode = NAND_ECC_SOFT;
break;
+ case AR934X_NFC_ECC_SOFT_BCH:
+ nand->ecc.mode = NAND_ECC_SOFT_BCH;
+ break;
+
case AR934X_NFC_ECC_HW:
ret = ar934x_nfc_setup_hwecc(nfc);
if (ret)
more:
DBG("%s: stay in polling mode, rx=%d, tx=%d, limit=%d\n",
dev->name, rx_done, tx_done, limit);
- return rx_done;
+ return limit;
oom:
if (netif_msg_rx_err(ag))
dev->irq = platform_get_irq(pdev, 0);
err = request_irq(dev->irq, ag71xx_interrupt,
- IRQF_DISABLED,
+ 0x0,
dev->name, dev);
if (err) {
dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq);
enum ar934x_nfc_ecc_mode {
AR934X_NFC_ECC_SOFT = 0,
AR934X_NFC_ECC_HW,
+ AR934X_NFC_ECC_SOFT_BCH,
};
struct ar934x_nfc_platform_data {
$(eval $(call KernelPackage,leds-wndr3700-usb))
-define KernelPackage/nand-ar934x
- SUBMENU:=$(OTHER_MENU)
- TITLE:=Atheros AR934x NAND flash controller driver
- KCONFIG:=\
- CONFIG_MTD_NAND_AR934X \
- CONFIG_MTD_NAND_AR934X_HW_ECC=y
- DEPENDS:=@TARGET_ar71xx +kmod-nand
- FILES:=$(LINUX_DIR)/drivers/mtd/nand/ar934x_nfc.ko
- AUTOLOAD:=$(call AutoLoad,25,ar934x_nfc)
-endef
-
-define KernelPackage/nand-ar934x/description
- Atheros AR934x NAND flash controller driver.
-endef
-
-$(eval $(call KernelPackage,nand-ar934x))
-
-
define KernelPackage/spi-vsc7385
SUBMENU:=$(SPI_MENU)
TITLE:=Vitesse VSC7385 ethernet switch driver
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
# CONFIG_CRYPTO_DEV_MV_CESA is not set
# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set
+# CONFIG_CRYPTO_DEV_QCE is not set
# CONFIG_CRYPTO_DEV_SAHARA is not set
# CONFIG_CRYPTO_DEV_TALITOS is not set
# CONFIG_CRYPTO_DRBG_MENU is not set
# CONFIG_HID_LENOVO_TPKBD is not set
# CONFIG_HID_LOGITECH is not set
# CONFIG_HID_LOGITECH_DJ is not set
+# CONFIG_HID_LOGITECH_HIDPP is not set
# CONFIG_HID_MAGICMOUSE is not set
# CONFIG_HID_MICROSOFT is not set
# CONFIG_HID_MONTEREY is not set
# CONFIG_IDE_PHISON is not set
# CONFIG_IDE_PROC_FS is not set
# CONFIG_IDE_TASK_IOCTL is not set
+# CONFIG_IEEE802154 is not set
# CONFIG_IEEE802154_FAKEHARD is not set
# CONFIG_IFB is not set
# CONFIG_IGB is not set
# CONFIG_MMC_SDHCI is not set
# CONFIG_MMC_SDHCI_ACPI is not set
# CONFIG_MMC_SDHCI_BCM_KONA is not set
+# CONFIG_MMC_SDHCI_MSM is not set
# CONFIG_MMC_SDHCI_OF_ARASAN is not set
# CONFIG_MMC_SDHCI_OF_ESDHC is not set
# CONFIG_MMC_SDHCI_OF_HLWD is not set
# CONFIG_R8187SE is not set
# CONFIG_R8188EU is not set
# CONFIG_R8712U is not set
+# CONFIG_R8723AU is not set
# CONFIG_RADIO_ADAPTERS is not set
# CONFIG_RADIO_AZTECH is not set
# CONFIG_RADIO_CADET is not set
# CONFIG_REDWOOD is not set
# CONFIG_REGMAP is not set
# CONFIG_REGMAP_I2C is not set
+# CONFIG_REGMAP_MMIO is not set
# CONFIG_REGMAP_SPI is not set
# CONFIG_REGULATOR is not set
# CONFIG_REGULATOR_ACT8865 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_UFSHCD is not set
# CONFIG_SCSI_ULTRASTOR is not set
+# CONFIG_SCSI_VIRTIO is not set
# CONFIG_SCx200_ACB is not set
# CONFIG_SDIO_UART is not set
# CONFIG_SECCOMP is not set
# CONFIG_SENSORS_HMC5843_I2C is not set
# CONFIG_SENSORS_HMC5843_SPI is not set
# CONFIG_SENSORS_HTU21 is not set
+# CONFIG_SENSORS_I5500 is not set
# CONFIG_SENSORS_I5K_AMB is not set
# CONFIG_SENSORS_IIO_HWMON is not set
# CONFIG_SENSORS_INA209 is not set
# CONFIG_STE10XP is not set
# CONFIG_STE_MODEM_RPROC is not set
# CONFIG_STMMAC_ETH is not set
+# CONFIG_STMMAC_PLATFORM is not set
+# CONFIG_STMMAC_PCI is not set
CONFIG_STP=y
# CONFIG_STRICT_DEVMEM is not set
CONFIG_STRIP_ASM_SYMS=y
# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set
# CONFIG_X86_PKG_TEMP_THERMAL is not set
CONFIG_X86_SYSFB=y
+# CONFIG_XEN is not set
CONFIG_XFRM=y
# CONFIG_XFRM_IPCOMP is not set
# CONFIG_XFRM_MIGRATE is not set
BUILD_B43_TOOLS = y
endif
-tools-$(BUILD_TOOLCHAIN) += gmp mpfr mpc libelf
+tools-$(BUILD_TOOLCHAIN) += gmp mpfr mpc libelf expat
tools-y += m4 libtool autoconf automake flex bison pkg-config sed mklibs
tools-y += sstrip ipkg-utils make-ext4fs genext2fs e2fsprogs mtd-utils mkimage
tools-y += firmware-utils patch-image patch quilt yaffs2 flock padjffs2
--- /dev/null
+#
+# Copyright (C) 2006-2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=expat
+PKG_VERSION:=2.1.0
+
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
+PKG_MD5SUM:=dd7dab7a5fea97d2a6a43f511449b7cd
+PKG_SOURCE_URL:=@SF/expat
+
+HOST_BUILD_PARALLEL:=1
+
+include $(INCLUDE_DIR)/host-build.mk
+
+define Host/Install
+ $(MAKE) -C $(HOST_BUILD_DIR) install
+endef
+
+$(eval $(call HostBuild))
projects / librecmc / librecmc-fossil.git / commitdiff