arm: dts: k3-j721e-main: Add UFS nodes

Add TI UFS glue layer and Cadence UFS Host controller DT nodes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi
index 6bd59bac52d651f7f49b39f4e43b9be442d6c2c0..3a0763209fc2172b042abefd571253d412f7ec9f 100644 (file)
--- a/arch/arm/dts/k3-j721e-main.dtsi
+++ b/arch/arm/dts/k3-j721e-main.dtsi
@@ -339,4 +339,28 @@
                ti,sci-proc-ids = <0x30 0xFF>;
                resets = <&k3_reset 15 1>;
        };
+
+       ufs_wrapper: ufs-wrapper@4e80000 {
+               compatible = "ti,j721e-ufs";
+               reg = <0x0 0x4e80000 0x0 0x100>;
+               power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&k3_clks 277 1>;
+               assigned-clocks = <&k3_clks 277 1>;
+               assigned-clock-parents = <&k3_clks 277 4>;
+               ranges;
+               #address-cells = <2>;
+               #size-cells = <2>;
+
+               ufs@4e84000 {
+                       compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
+                       reg = <0x0 0x4e84000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+                       freq-table-hz = <0 0>, <0 0>;
+                       clocks = <&k3_clks 277 0>, <&k3_clks 277 1>;
+                       clock-names = "core_clk", "phy_clk";
+                       assigned-clocks = <&k3_clks 277 1>;
+                       assigned-clock-parents = <&k3_clks 277 4>;
+                       dma-coherent;
+               };
+       };
 };