arm64: versal: Disable DDR cache mapping if DDR is not enabled

Similar change was done in past by commit 3b644a3c2f69
("arm64: zynqmp: Provide a config to not map DDR region in MMU table").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/mach-versal/Kconfig b/arch/arm/mach-versal/Kconfig
index a08e5ae41490011f98d9b11b78ae06333fdb9b5a..e1d66e8d32b7ed6bf9832cb5668df0c052fe4e92 100644 (file)
--- a/arch/arm/mach-versal/Kconfig
+++ b/arch/arm/mach-versal/Kconfig
@@ -56,4 +56,10 @@ config DEFINE_TCM_OCM_MMAP
          This option if enabled defines the TCM and OCM memory and its
          memory attributes in MMU table entry.
 
+config VERSAL_NO_DDR
+       bool "Disable DDR MMU mapping"
+       help
+         This option configures MMU with no DDR to avoid speculative
+         access to DDR memory where DDR is not present.
+
 endif

diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 6ee6cd43eca4ca83119595b4f6e9cde860796989..829a6c1b3e5354dc7bbcdf2dd836faa6ffe3e15e 100644 (file)
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -81,6 +81,15 @@ void mem_map_fill(void)
                if (!gd->bd->bi_dram[i].size)
                        break;
 
+#if defined(CONFIG_VERSAL_NO_DDR)
+               if (gd->bd->bi_dram[i].start < 0x80000000UL ||
+                   gd->bd->bi_dram[i].start > 0x100000000UL) {
+                       printf("Ignore caches over %llx/%llx\n",
+                              gd->bd->bi_dram[i].start,
+                              gd->bd->bi_dram[i].size);
+                       continue;
+               }
+#endif
                versal_mem_map[banks].virt = gd->bd->bi_dram[i].start;
                versal_mem_map[banks].phys = gd->bd->bi_dram[i].start;
                versal_mem_map[banks].size = gd->bd->bi_dram[i].size;