mpc83xx: Fix PCI, USB, bootargs for MPC8349E-mITX

PREREQUISITE PATCHES:

* This patch can only be applied after the following patches have been applied:

  1) DNX#2006092142000015 "Add support for the MPC8349E-mITX  1/2"
  2) DNX#2006092142000024 "Add support for the MPC8349E-mITX  2/2"

CHANGELOG:

* For the 8349E-mITX, fix some size values in pci_init_board(), enable
  the clock for the 2nd USB board (Linux kernel will hang otherwise),
  and fix the CONFIG_BOOTARGS macro.

Signed-off-by: Timur Tabi <timur@freescale.com>

diff --git a/board/mpc8349itx/pci.c b/board/mpc8349itx/pci.c
index 247b3a6ecc94e962100d7e43532bc790503ab84a..acac185d54da33b354c71d1f715f53b9df0a00f9 100644 (file)
--- a/board/mpc8349itx/pci.c
+++ b/board/mpc8349itx/pci.c
@@ -150,7 +150,7 @@ void pci_init_board(void)
        pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
 
        pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
-       pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
+       pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M;
 
        /*
         * Configure PCI Outbound Translation Windows
@@ -159,18 +159,17 @@ void pci_init_board(void)
        /* PCI1 mem space - prefetch */
        pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[0].pocmr =
-           POCMR_EN | POCMR_PREFETCH_EN | (POCMR_CM_256M & POCMR_CM_MASK);
+       pci_pot[0].pocmr = POCMR_EN | POCMR_PREFETCH_EN | POCMR_CM_256M;
 
        /* PCI1 IO space */
        pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
+       pci_pot[1].pocmr = POCMR_EN | POCMR_IO | POCMR_CM_16M;
 
        /* PCI1 mmio - non-prefetch mem space */
        pci_pot[2].potar = (CFG_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[2].pobar = (CFG_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[2].pocmr = POCMR_EN | (POCMR_CM_256M & POCMR_CM_MASK);
+       pci_pot[2].pocmr = POCMR_EN | POCMR_CM_256M;
 
        /*
         * Configure PCI Inbound Translation Windows
@@ -250,21 +249,17 @@ void pci_init_board(void)
        /* PCI2 mem space - prefetch */
        pci_pot[3].potar = (CFG_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[3].pobar = (CFG_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[3].pocmr =
-           POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | (POCMR_CM_256M &
-                                                        POCMR_CM_MASK);
+       pci_pot[3].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | POCMR_CM_256M;
 
        /* PCI2 IO space */
        pci_pot[4].potar = (CFG_PCI2_IO_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[4].pobar = (CFG_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[4].pocmr =
-           POCMR_EN | POCMR_PCI2 | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
+       pci_pot[4].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_IO | POCMR_CM_16M;
 
        /* PCI2 mmio - non-prefetch mem space */
        pci_pot[5].potar = (CFG_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[5].pobar = (CFG_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[5].pocmr =
-           POCMR_EN | POCMR_PCI2 | (POCMR_CM_256M & POCMR_CM_MASK);
+       pci_pot[5].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_CM_256M;
 
        /*
         * Configure PCI Inbound Translation Windows

diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index aed350fe0947edce7ca0c3380bf212de6fcfadc0..20f3c6d3996d9c064bcfa97400c4e32006e7e3c8 100644 (file)
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -604,7 +604,7 @@
 
 /* System IO Config */
 #define CFG_SICRH SICRH_TSOBI1 /* Needed for gigabit to work on TSEC 1 */
-#define CFG_SICRL SICRL_LDP_A
+#define CFG_SICRL (SICRL_LDP_A | SICRL_USB1)
 
 #define CFG_HID0_INIT 0x000000000
 
@@ -701,7 +701,7 @@
 #define CONFIG_SERVERIP                10.82.48.106
 #define CONFIG_GATEWAYIP       10.82.19.254
 #define CONFIG_NETMASK         255.255.252.0
-
+#define CONFIG_NETDEV          eth0
 
 #define CONFIG_HOSTNAME                mpc8349emitx
 #define CONFIG_ROOTPATH                /nfsroot0/u/timur/itx-ltib/rootfs
@@ -722,16 +722,19 @@
 #define CONFIG_BOOTDELAY       -1      /* -1 disables auto-boot */
 #endif
 
-#define CONFIG_BOOTARGS \
-       "root=/dev/nfs rw nfsroot=$serverip:$rootpath " \
-       "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
-       "console=ttyS0,$baudrate $othbootargs"
-
 #define XMK_STR(x)     #x
 #define MK_STR(x)      XMK_STR(x)
 
+#define CONFIG_BOOTARGS \
+       "root=/dev/nfs rw" \
+       " nfsroot=" MK_STR(CONFIG_SERVERIP) ":" MK_STR(CONFIG_ROOTPATH) \
+       " ip=" MK_STR(CONFIG_IPADDR) ":" MK_STR(CONFIG_SERVERIP) ":" \
+               MK_STR(CONFIG_GATEWAYIP) ":" MK_STR(CONFIG_NETMASK) ":" \
+               MK_STR(CONFIG_HOSTNAME) ":" MK_STR(CONFIG_NETDEV) ":off" \
+       " console=ttyS0," MK_STR(CONFIG_BAUDRATE)
+
 #define        CONFIG_EXTRA_ENV_SETTINGS \
-       "netdev=eth0\0" \
+       "netdev=" MK_STR(CONFIG_NETDEV) "\0" \
        "tftpflash=tftpboot $loadaddr " MK_STR(CONFIG_UBOOTPATH) "; " \
                "erase " MK_STR(CONFIG_UBOOTSTART) " " MK_STR(CONFIG_UBOOTEND) "; " \
                "cp.b $loadaddr " MK_STR(CONFIG_UBOOTSTART) " $filesize; " \