rockchip: correct the bank0 ram size
authorKever Yang <kever.yang@rock-chips.com>
Fri, 23 Jun 2017 08:11:11 +0000 (16:11 +0800)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tue, 11 Jul 2017 10:13:45 +0000 (12:13 +0200)
The bank0 ram size should be the DRAM size minus reserved size,
the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Added DECLARE_GLOBAL_DATA_PTR for RK3328, RK3368 and RK3399:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
arch/arm/mach-rockchip/rk3328/rk3328.c
arch/arm/mach-rockchip/rk3368/rk3368.c
arch/arm/mach-rockchip/rk3399/rk3399.c
board/geekbuying/geekbox/geekbox.c
board/rockchip/evb_px5/evb-px5.c
board/rockchip/evb_rk3328/evb-rk3328.c
board/rockchip/evb_rk3399/evb-rk3399.c
board/rockchip/sheep_rk3368/sheep_rk3368.c
board/theobroma-systems/puma_rk3399/puma-rk3399.c

index cec6f905f6ca819f0f211ef438fb63a1b4e02a79..6764494d3bbc6061f2cc400c286bfecb786d9e59 100644 (file)
@@ -9,6 +9,8 @@
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static struct mm_region rk3328_mem_map[] = {
        {
                .virt = 0x0UL,
@@ -31,6 +33,17 @@ static struct mm_region rk3328_mem_map[] = {
 
 struct mm_region *mem_map = rk3328_mem_map;
 
+int dram_init_banksize(void)
+{
+       size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
+
+       /* Reserve 0x200000 for ATF bl31 */
+       gd->bd->bi_dram[0].start = 0x200000;
+       gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
+
+       return 0;
+}
+
 int arch_cpu_init(void)
 {
        /* We do some SoC one time setting here. */
index fb829a4a3748f6ac5a8ca6914678170970c8e176..f62d91df74c54230dda8365969879781339f5849 100644 (file)
@@ -13,6 +13,8 @@
 #include <asm/arch/grf_rk3368.h>
 #include <syscon.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define IMEM_BASE                  0xFF8C0000
 
 /* Max MCU's SRAM value is 8K, begin at (IMEM_BASE + 4K) */
@@ -50,6 +52,17 @@ static struct mm_region rk3368_mem_map[] = {
 
 struct mm_region *mem_map = rk3368_mem_map;
 
+int dram_init_banksize(void)
+{
+       size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
+
+       /* Reserve 0x200000 for ATF bl31 */
+       gd->bd->bi_dram[0].start = 0x200000;
+       gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
+
+       return 0;
+}
+
 #ifdef CONFIG_ARCH_EARLY_INIT_R
 static int mcu_init(void)
 {
index a621a6ff2ab78ad3a62b65979ead23c3f809eed8..dbc248f84a74053735c29456fda3e2f0791dce81 100644 (file)
@@ -9,6 +9,8 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define GRF_EMMCCORE_CON11 0xff77f02c
 
 static struct mm_region rk3399_mem_map[] = {
@@ -33,6 +35,17 @@ static struct mm_region rk3399_mem_map[] = {
 
 struct mm_region *mem_map = rk3399_mem_map;
 
+int dram_init_banksize(void)
+{
+       size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
+
+       /* Reserve 0x200000 for ATF bl31 */
+       gd->bd->bi_dram[0].start = 0x200000;
+       gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
+
+       return 0;
+}
+
 int arch_cpu_init(void)
 {
        /* We do some SoC one time setting here. */
index 422a03878e204ecd705bd60a3763cdf7e0737efc..88b67f9d5f31f5c31fab078f5def893d9814b1ef 100644 (file)
@@ -12,11 +12,3 @@ int board_init(void)
 {
        return 0;
 }
-
-int dram_init_banksize(void)
-{
-       gd->bd->bi_dram[0].start = 0;
-       gd->bd->bi_dram[0].size = 0x80000000;
-
-       return 0;
-}
index 7576581d9f2ffc670bef7f2842a96dea5e68367d..6dca1fc74b92b32c3bd87377347f76c639693700 100644 (file)
@@ -33,12 +33,3 @@ int board_init(void)
 {
        return 0;
 }
-
-int dram_init_banksize(void)
-{
-        /* Reserve 0x200000 for ATF bl31 */
-       gd->bd->bi_dram[0].start = 0x200000;
-       gd->bd->bi_dram[0].size = 0x3fe00000;
-
-       return 0;
-}
index 75674bb38a8f66db8e14a31249860c2c8c2978ec..bb2936352a0dc99d96f85924531cece8a7742c75 100644 (file)
@@ -16,15 +16,6 @@ int board_init(void)
        return 0;
 }
 
-int dram_init_banksize(void)
-{
-       /* Reserve 0x200000 for ATF bl31 */
-       gd->bd->bi_dram[0].start = 0x200000;
-       gd->bd->bi_dram[0].size = 0x7e000000;
-
-       return 0;
-}
-
 int board_usb_init(int index, enum usb_init_type init)
 {
        return 0;
index 950bde6af6ef890291f79e1dadeea7ae807c7080..d50c59db8dde5df228324c5f99b7550657f26e3b 100644 (file)
@@ -67,12 +67,3 @@ int board_init(void)
 out:
        return 0;
 }
-
-int dram_init_banksize(void)
-{
-       /* Reserve 0x200000 for ATF bl31 */
-       gd->bd->bi_dram[0].start = 0x200000;
-       gd->bd->bi_dram[0].size = 0x7e000000;
-
-       return 0;
-}
index e6d23611fdb17d52471e4c5c3253fea8dba6dfbe..17adb02469de0c4166b1281d9c3e33ca8a2f911c 100644 (file)
@@ -20,11 +20,3 @@ int board_init(void)
 {
        return 0;
 }
-
-int dram_init_banksize(void)
-{
-       gd->bd->bi_dram[0].start = 0x200000;
-       gd->bd->bi_dram[0].size = 0x7fe00000;
-
-       return 0;
-}
index 740baf52e4b1ed33a31f91f4ff2d93ae913cf3b9..36e9cd7f842a7caf422844d7e3f15de3429f500c 100644 (file)
@@ -180,12 +180,3 @@ void get_board_serial(struct tag_serialnr *serialnr)
        serialnr->low = (u32)(serial & 0xffffffff);
 }
 #endif
-
-int dram_init_banksize(void)
-{
-       /* Reserve 0x200000 for ATF bl31 */
-       gd->bd->bi_dram[0].start = 0x200000;
-       gd->bd->bi_dram[0].size = 0x7e000000;
-
-       return 0;
-}