arm: mvebu: turris_mox: don't use hardcoded addresses
authorMarek Behún <marek.behun@nic.cz>
Wed, 8 Apr 2020 10:02:07 +0000 (12:02 +0200)
committerStefan Roese <sr@denx.de>
Tue, 14 Apr 2020 11:16:42 +0000 (13:16 +0200)
Use macro MVEBU_REGISTER to access register addresses instead of
hardcoded addresses.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
board/CZ.NIC/turris_mox/mox_sp.c
board/CZ.NIC/turris_mox/turris_mox.c

index 0b29ffcc6727dff619f1c35ae19ad8c218d719dd..3c23471e6562e25ab0b3b0dba9261b75c552e765 100644 (file)
@@ -4,15 +4,17 @@
  */
 
 #include <common.h>
+#include <asm/arch/soc.h>
 #include <asm/io.h>
 
-#define RWTM_CMD_PARAM(i)      (size_t)(0xd00b0000 + (i) * 4)
-#define RWTM_CMD               0xd00b0040
-#define RWTM_CMD_RETSTATUS     0xd00b0080
-#define RWTM_CMD_STATUS(i)     (size_t)(0xd00b0084 + (i) * 4)
+#define RWTM_BASE              (MVEBU_REGISTER(0xb0000))
+#define RWTM_CMD_PARAM(i)      (size_t)(RWTM_BASE + (i) * 4)
+#define RWTM_CMD               (RWTM_BASE + 0x40)
+#define RWTM_CMD_RETSTATUS     (RWTM_BASE + 0x80)
+#define RWTM_CMD_STATUS(i)     (size_t)(RWTM_BASE + 0x84 + (i) * 4)
 
-#define RWTM_HOST_INT_RESET    0xd00b00c8
-#define RWTM_HOST_INT_MASK     0xd00b00cc
+#define RWTM_HOST_INT_RESET    (RWTM_BASE + 0xc8)
+#define RWTM_HOST_INT_MASK     (RWTM_BASE + 0xcc)
 #define SP_CMD_COMPLETE                BIT(0)
 
 #define MBOX_STS_SUCCESS               (0x0 << 30)
index 6e937826d0273e57318a48dfa45b200921396e7a..cd39b1c01fdb0acbbc72471042b82e063d88d961 100644 (file)
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <asm/arch/soc.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <dm.h>
 #define MOX_MODULE_USB3                0x5
 #define MOX_MODULE_PASSPCI     0x6
 
-#define ARMADA_37XX_NB_GPIO_SEL        0xd0013830
-#define ARMADA_37XX_SPI_CTRL   0xd0010600
-#define ARMADA_37XX_SPI_CFG    0xd0010604
-#define ARMADA_37XX_SPI_DOUT   0xd0010608
-#define ARMADA_37XX_SPI_DIN    0xd001060c
+#define ARMADA_37XX_NB_GPIO_SEL        (MVEBU_REGISTER(0x13830))
+#define ARMADA_37XX_SPI_CTRL   (MVEBU_REGISTER(0x10600))
+#define ARMADA_37XX_SPI_CFG    (MVEBU_REGISTER(0x10604))
+#define ARMADA_37XX_SPI_DOUT   (MVEBU_REGISTER(0x10608))
+#define ARMADA_37XX_SPI_DIN    (MVEBU_REGISTER(0x1060c))
 
 #define ETH1_PATH      "/soc/internal-regs@d0000000/ethernet@40000"
 #define MDIO_PATH      "/soc/internal-regs@d0000000/mdio@32004"