select SYS_FSL_ERRATUM_A009008
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
+ select SYS_I2C_MXC
+ select SYS_I2C_MXC_I2C1
+ select SYS_I2C_MXC_I2C2
imply PANIC_HANG
config ARCH_LS1043A
select SYS_FSL_HAS_DDR4
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
+ select SYS_I2C_MXC
+ select SYS_I2C_MXC_I2C1
+ select SYS_I2C_MXC_I2C2
+ select SYS_I2C_MXC_I2C3
+ select SYS_I2C_MXC_I2C4
imply SCSI
imply SCSI_AHCI
imply CMD_PCI
select SYS_FSL_SRDS_2
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
+ select SYS_I2C_MXC
+ select SYS_I2C_MXC_I2C1
+ select SYS_I2C_MXC_I2C2
+ select SYS_I2C_MXC_I2C3
+ select SYS_I2C_MXC_I2C4
imply SCSI
imply SCSI_AHCI
select FSL_TZASC_1
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
+ select SYS_I2C_MXC
+ select SYS_I2C_MXC_I2C1
+ select SYS_I2C_MXC_I2C2
+ select SYS_I2C_MXC_I2C3
+ select SYS_I2C_MXC_I2C4
imply SCSI
imply PANIC_HANG
select SYS_FSL_ERRATUM_A009203
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
+ select SYS_I2C_MXC
+ select SYS_I2C_MXC_I2C1
+ select SYS_I2C_MXC_I2C2
+ select SYS_I2C_MXC_I2C3
+ select SYS_I2C_MXC_I2C4
imply PANIC_HANG
config FSL_LSCH2
both 7-bit and 10-bit addresses.
config SYS_I2C_MXC
- bool "NXP i.MX I2C driver"
- depends on MX6
+ bool "NXP MXC I2C driver"
help
- Add support for the NXP i.MX I2C driver. This supports upto for bus
+ Add support for the NXP I2C driver. This supports upto for bus
channels and operating on standard mode upto 100 kbits/s and fast
mode upto 400 kbits/s.
+if SYS_I2C_MXC
+config SYS_I2C_MXC_I2C1
+ bool "NXP MXC I2C1"
+ help
+ Add support for NXP MXC I2C Controller 1.
+ Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
+
+config SYS_I2C_MXC_I2C2
+ bool "NXP MXC I2C2"
+ help
+ Add support for NXP MXC I2C Controller 2.
+ Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
+
+config SYS_I2C_MXC_I2C3
+ bool "NXP MXC I2C3"
+ help
+ Add support for NXP MXC I2C Controller 3.
+ Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
+
+config SYS_I2C_MXC_I2C4
+ bool "NXP MXC I2C4"
+ help
+ Add support for NXP MXC I2C Controller 4.
+ Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
+endif
+
+if SYS_I2C_MXC_I2C1
+config SYS_MXC_I2C1_SPEED
+ int "I2C Channel 1 speed"
+ default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
+ default 100000
+ help
+ MXC I2C Channel 1 speed
+
+config SYS_MXC_I2C1_SLAVE
+ int "I2C1 Slave"
+ default 0
+ help
+ MXC I2C1 Slave
+endif
+
+if SYS_I2C_MXC_I2C2
+config SYS_MXC_I2C2_SPEED
+ int "I2C Channel 2 speed"
+ default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
+ default 100000
+ help
+ MXC I2C Channel 2 speed
+
+config SYS_MXC_I2C2_SLAVE
+ int "I2C2 Slave"
+ default 0
+ help
+ MXC I2C2 Slave
+endif
+
+if SYS_I2C_MXC_I2C3
+config SYS_MXC_I2C3_SPEED
+ int "I2C Channel 3 speed"
+ default 100000
+ help
+ MXC I2C Channel 3 speed
+
+config SYS_MXC_I2C3_SLAVE
+ int "I2C3 Slave"
+ default 0
+ help
+ MXC I2C3 Slave
+endif
+
+if SYS_I2C_MXC_I2C4
+config SYS_MXC_I2C4_SPEED
+ int "I2C Channel 4 speed"
+ default 100000
+ help
+ MXC I2C Channel 4 speed
+
+config SYS_MXC_I2C4_SLAVE
+ int "I2C4 Slave"
+ default 0
+ help
+ MXC I2C4 Slave
+endif
+
config SYS_I2C_OMAP24XX
bool "TI OMAP2+ I2C driver"
depends on ARCH_OMAP2PLUS
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-#define CONFIG_SYS_I2C_MXC_I2C4
/* PCIe */
#ifndef SPL_NO_PCIE
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-#define CONFIG_SYS_I2C_MXC_I2C4
/* PCIe */
#define CONFIG_PCIE1 /* PCIE controller 1 */
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
/* Serial Port */
#define CONFIG_CONS_INDEX 1
/* I2C */
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
/* Serial Port */
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333
-#define CONFIG_SYS_MXC_I2C1_SPEED 40000000
-#define CONFIG_SYS_MXC_I2C2_SPEED 40000000
-
#define CONFIG_DDR_SPD
#define CONFIG_SYS_FSL_DDR_EMU /* Support emulator */
#define SPD_EEPROM_ADDRESS1 0x51
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333
-#define CONFIG_SYS_MXC_I2C1_SPEED 40000000
-#define CONFIG_SYS_MXC_I2C2_SPEED 40000000
-
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#ifdef CONFIG_SYS_FSL_HAS_DP_DDR