ppc4xx: Add a comment for 405EX PCIe endpoint configuration

Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/cpu/ppc4xx/4xx_pcie.c b/cpu/ppc4xx/4xx_pcie.c
index 2bc9638f414826161c669c04356822893b00c48e..177e2ad2e7acc7eefa40f48c23fbe5991ec5a4cd 100644 (file)
--- a/cpu/ppc4xx/4xx_pcie.c
+++ b/cpu/ppc4xx/4xx_pcie.c
@@ -431,6 +431,12 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport)
 {
        u32 val;
 
+       /*
+        * test-only:
+        * This needs some testing and perhaps changes for
+        * endpoint configuration. Probably no PHY reset at all, etc.
+        * sr, 2007-10-03
+        */
        if (rootport)
                val = 0x00401000;
        else