omap4460: add ES1.1 identification
authorAneesh V <aneesh@ti.com>
Mon, 21 Nov 2011 23:39:03 +0000 (23:39 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tue, 6 Dec 2011 22:59:34 +0000 (23:59 +0100)
Signed-off-by: Aneesh V <aneesh@ti.com>
arch/arm/cpu/armv7/omap4/hwinit.c
arch/arm/include/asm/arch-omap4/omap.h
arch/arm/include/asm/omap_common.h

index 52c9b19012a3b987128bb9b2587f1da2e73bbc4a..cd1451a0bf5e1859a57a2905e64452928158a60b 100644 (file)
@@ -146,7 +146,15 @@ void init_omap_revision(void)
                *omap4_revision = OMAP4430_ES2_3;
                break;
        case MIDR_CORTEX_A9_R2P10:
-               *omap4_revision = OMAP4460_ES1_0;
+               switch (readl(CONTROL_ID_CODE)) {
+               case OMAP4460_CONTROL_ID_CODE_ES1_1:
+                       *omap4_revision = OMAP4460_ES1_1;
+                       break;
+               case OMAP4460_CONTROL_ID_CODE_ES1_0:
+               default:
+                       *omap4_revision = OMAP4460_ES1_0;
+                       break;
+               }
                break;
        default:
                *omap4_revision = OMAP4430_SILICON_ID_INVALID;
index e9942574f2a3b5b185dc3e9a9ccb6fed78656d67..4d8c89ffbdff1450cc882d54f4840319aa91817a 100644 (file)
@@ -63,6 +63,8 @@
 #define OMAP4_CONTROL_ID_CODE_ES2_1    0x3B95C02F
 #define OMAP4_CONTROL_ID_CODE_ES2_2    0x4B95C02F
 #define OMAP4_CONTROL_ID_CODE_ES2_3    0x6B95C02F
+#define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F
+#define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F
 
 /* UART */
 #define UART1_BASE             (OMAP44XX_L4_PER_BASE + 0x6a000)
index f1562ea4abc71c4eeaf84b53e2dd70cfdde7652c..913231b29241d2ca41b561dd762a5fba2242871a 100644 (file)
@@ -108,6 +108,7 @@ void spl_mmc_load_image(void);
 #define OMAP4430_ES2_2 0x44300220
 #define OMAP4430_ES2_3 0x44300230
 #define OMAP4460_ES1_0 0x44600100
+#define OMAP4460_ES1_1 0x44600110
 
 /* omap5 */
 #define OMAP5430_SILICON_ID_INVALID    0