ARM: OMAP4/5: Centralize early clock initialization
authorKipisz, Steven <s-kipisz2@ti.com>
Wed, 24 Feb 2016 18:30:52 +0000 (12:30 -0600)
committerTom Rini <trini@konsulko.com>
Mon, 14 Mar 2016 23:18:32 +0000 (19:18 -0400)
Early clock initialization is currently done in two stages for OMAP4/5
SoCs. The first stage is the initialization of console clocks and
then we initialize basic clocks for functionality necessary for SoC
initialization and basic board functionality.

By splitting up prcm_init and centralizing this clock initialization,
we setup the code for follow on patches that can do board specific
initialization such as board detection which will depend on these
basic clocks.

As part of this change, since the early clock initialization
is centralized, we no longer need to expose the console clock
initialization.

NOTE: we change the sequence slightly by initializing console clocks
timer after the io settings are complete, but this is not expected
to have any functioanlity impact since we setup the basic IO drive
strength initialization as part of do_io_settings.

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
arch/arm/cpu/armv7/omap-common/clocks-common.c
arch/arm/cpu/armv7/omap-common/hwinit-common.c
arch/arm/include/asm/arch-omap4/sys_proto.h
arch/arm/include/asm/arch-omap5/sys_proto.h

index e28b79568d1d1f1137414f64af1fd6f9f46a1c1e..367d224361bec19b20772e1401ef3933ca546adc 100644 (file)
@@ -769,7 +769,7 @@ void lock_dpll(u32 const base)
        wait_for_lock(base);
 }
 
-void setup_clocks_for_console(void)
+static void setup_clocks_for_console(void)
 {
        /* Do not add any spl_debug prints in this function */
        clrsetbits_le32((*prcm)->cm_l4per_clkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK,
@@ -853,14 +853,31 @@ void do_disable_clocks(u32 const *clk_domains,
                disable_clock_domain(clk_domains[i]);
 }
 
-void prcm_init(void)
+/**
+ * setup_early_clocks() - Setup early clocks needed for SoC
+ *
+ * Setup clocks for console, SPL basic initialization clocks and initialize
+ * the timer. This is invoked prior prcm_init.
+ */
+void setup_early_clocks(void)
 {
        switch (omap_hw_init_context()) {
        case OMAP_INIT_CONTEXT_SPL:
        case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
        case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
+               setup_clocks_for_console();
                enable_basic_clocks();
                timer_init();
+               /* Fall through */
+       }
+}
+
+void prcm_init(void)
+{
+       switch (omap_hw_init_context()) {
+       case OMAP_INIT_CONTEXT_SPL:
+       case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
+       case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
                scale_vcores(*omap_vcores);
                setup_dplls();
                setup_warmreset_time();
index 80794f9c611ad2990972b61d69ac4cdaf6ea390d..91f2dead364b06361b259d91dcef2875a5491218 100644 (file)
@@ -125,10 +125,9 @@ void s_init(void)
        set_mux_conf_regs();
 #ifdef CONFIG_SPL_BUILD
        srcomp_enable();
-       setup_clocks_for_console();
-
        do_io_settings();
 #endif
+       setup_early_clocks();
        prcm_init();
 }
 
index f30f86539130ad1cb58485aa44a831202ba9537a..71e3d776aa0d0a5d25ab8da46b09bca856625f56 100644 (file)
@@ -37,7 +37,7 @@ void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
 void set_muxconf_regs_essential(void);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
-void setup_clocks_for_console(void);
+void setup_early_clocks(void);
 void prcm_init(void);
 void bypass_dpll(u32 const base);
 void freq_update_core(void);
index 7fcb7838940369c8613d1ce731b050a30f3d15d4..b9e09e7c52a8dbaf56c4990eb2e2286114b2dea2 100644 (file)
@@ -48,7 +48,7 @@ void do_set_mux32(u32 base, struct pad_conf_entry const *array, int size);
 void set_muxconf_regs_essential(void);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
-void setup_clocks_for_console(void);
+void setup_early_clocks(void);
 void prcm_init(void);
 void bypass_dpll(u32 const base);
 void freq_update_core(void);