ColdFire: Fix M5329EVB and M5373EVB nand issue
authorTsiChung Liew <Tsi-Chung.Liew@freescale.com>
Mon, 2 Mar 2009 19:16:45 +0000 (19:16 +0000)
committerJohn Rigby <jrigby@freescale.com>
Tue, 17 Mar 2009 21:58:37 +0000 (15:58 -0600)
The Nand flash was unable to read and write properly
due to Nand Chip Select (nCE) setup was in reverse
order. Also, increase the Nand time out value to 60.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
board/freescale/m5329evb/nand.c
board/freescale/m5373evb/nand.c

index cf27dda2ffef8272c17f570c9f818df9658c91e0..16025f91e2ef73f531483a23623c56124cdb5f7e 100644 (file)
@@ -47,10 +47,12 @@ static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
                ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
 
                IO_ADDR_W &= ~(SET_ALE | SET_CLE);
-               *nCE &= 0xFFFB;
 
                if (ctrl & NAND_NCE)
+                       *nCE &= 0xFFFB;
+               else
                        *nCE |= 0x0004;
+
                if (ctrl & NAND_CLE)
                        IO_ADDR_W |= SET_CLE;
                if (ctrl & NAND_ALE)
@@ -78,7 +80,7 @@ int board_nand_init(struct nand_chip *nand)
        gpio->pclrr_timer = 0;
        gpio->podr_timer = 0;
 
-       nand->chip_delay = 50;
+       nand->chip_delay = 60;
        nand->ecc.mode = NAND_ECC_SOFT;
        nand->cmd_ctrl = nand_hwcontrol;
 
index 3ebef059e14d5fe1484792959de69e941fa05916..df8c03b8a272677f05e51178bca15450d163f928 100644 (file)
@@ -47,10 +47,12 @@ static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
                ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
 
                IO_ADDR_W &= ~(SET_ALE | SET_CLE);
-               *nCE &= 0xFFFB;
 
                if (ctrl & NAND_NCE)
+                       *nCE &= 0xFFFB;
+               else
                        *nCE |= 0x0004;
+
                if (ctrl & NAND_CLE)
                        IO_ADDR_W |= SET_CLE;
                if (ctrl & NAND_ALE)
@@ -82,7 +84,7 @@ int board_nand_init(struct nand_chip *nand)
        gpio->pclrr_timer = 0;
        gpio->podr_timer = 0;
 
-       nand->chip_delay = 50;
+       nand->chip_delay = 60;
        nand->ecc.mode = NAND_ECC_SOFT;
        nand->cmd_ctrl = nand_hwcontrol;