memory: Move TI_AEMIF config to KCONFIG
authorLokesh Vutla <lokeshvutla@ti.com>
Wed, 13 Apr 2016 04:20:59 +0000 (09:50 +0530)
committerTom Rini <trini@konsulko.com>
Mon, 18 Apr 2016 21:11:43 +0000 (17:11 -0400)
Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig
entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on
platforms with AEMIF controller.

Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
board/ti/ks2_evm/board.c
configs/k2e_evm_defconfig
configs/k2hk_evm_defconfig
configs/k2l_evm_defconfig
drivers/Kconfig
drivers/memory/Kconfig [new file with mode: 0644]
include/configs/ti_armv7_keystone2.h

index e16669da081fdcafbeea24068e0bd67ebc2cc91b..9e8ad932d4d3e2c01638e53f8297e58757125752 100644 (file)
@@ -20,6 +20,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if defined(CONFIG_TI_AEMIF)
 static struct aemif_config aemif_configs[] = {
        {                       /* CS0 */
                .mode           = AEMIF_MODE_NAND,
@@ -33,6 +34,7 @@ static struct aemif_config aemif_configs[] = {
                .width          = AEMIF_WIDTH_8,
        },
 };
+#endif
 
 int dram_init(void)
 {
@@ -42,7 +44,10 @@ int dram_init(void)
 
        gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
                                    CONFIG_MAX_RAM_BANK_SIZE);
+#if defined(CONFIG_TI_AEMIF)
        aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
+#endif
+
        if (ddr3_size)
                ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
        return 0;
index a3fa758ac3f1da1eefe153fcbf5ad54f9e142905..f45bce00a5a606cf90fdf66df3d0bec982911bad 100644 (file)
@@ -15,3 +15,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
+CONFIG_TI_AEMIF=y
index 83efcbba0fbb678511d3c7edbdc4df766f57a0a3..56b3fe4355b22558a0fe27cc3b7415f51955be05 100644 (file)
@@ -15,3 +15,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
+CONFIG_TI_AEMIF=y
index d2ebb1d466cddb2cc8a230bcaea519e72495080a..3863c5628ce25bc4062a6bd26d810e8f74c086a3 100644 (file)
@@ -15,3 +15,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_DM_ETH=y
 CONFIG_SYS_NS16550=y
+CONFIG_TI_AEMIF=y
index c82a94b7a50ca7272cca672cd64e052d09792ee1..118b66ed0e14c6828da5308abf01846c27b407e4 100644 (file)
@@ -30,6 +30,8 @@ source "drivers/input/Kconfig"
 
 source "drivers/led/Kconfig"
 
+source "drivers/memory/Kconfig"
+
 source "drivers/misc/Kconfig"
 
 source "drivers/mmc/Kconfig"
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
new file mode 100644 (file)
index 0000000..4fbb5aa
--- /dev/null
@@ -0,0 +1,18 @@
+#
+# Memory devices
+#
+
+menu "Memory Controller drivers"
+
+config TI_AEMIF
+       tristate "Texas Instruments AEMIF driver"
+       depends on ARCH_KEYSTONE
+       help
+         This driver is for the AEMIF module available in Texas Instruments
+         SoCs. AEMIF stands for Asynchronous External Memory Interface and
+         is intended to provide a glue-less interface to a variety of
+         asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
+         of 256M bytes of any of these memories can be accessed at a given
+         time via four chip selects with 64M byte access per chip select.
+
+endmenu
index 41185a159786a51c91643aed3b6d88f4738afcfd..61c71749be920af5f9e257059c2152504119d214 100644 (file)
 /* SerDes */
 #define CONFIG_TI_KEYSTONE_SERDES
 
-/* AEMIF */
-#define CONFIG_TI_AEMIF
 #define CONFIG_AEMIF_CNTRL_BASE                KS2_AEMIF_CNTRL_BASE
 
 /* I2C Configuration */