Merge branch 'master' of git://git.denx.de/u-boot
authorKim Phillips <kim.phillips@freescale.com>
Tue, 29 Jan 2013 23:30:39 +0000 (17:30 -0600)
committerKim Phillips <kim.phillips@freescale.com>
Tue, 29 Jan 2013 23:30:39 +0000 (17:30 -0600)
19 files changed:
drivers/i2c/mxs_i2c.c
include/configs/am3517_crane.h
include/configs/am3517_evm.h
include/configs/cm_t35.h
include/configs/devkit8000.h
include/configs/dig297.h
include/configs/igep00x0.h
include/configs/mcx.h
include/configs/omap3_beagle.h
include/configs/omap3_evm_common.h
include/configs/omap3_logic.h
include/configs/omap3_mvblx.h
include/configs/omap3_pandora.h
include/configs/omap3_sdp3430.h
include/configs/omap3_zoom1.h
include/configs/omap3_zoom2.h
include/configs/omap4_common.h
include/configs/tam3517-common.h
include/configs/tricorder.h

index b907f7b379bb6c6bb02aabffdff363f4560bc23c..2a5f110e1df06638f15f89f5de9bf56c722517df 100644 (file)
@@ -37,7 +37,7 @@
 
 #define        MXS_I2C_MAX_TIMEOUT     1000000
 
-void mxs_i2c_reset(void)
+static void mxs_i2c_reset(void)
 {
        struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
        int ret;
@@ -59,7 +59,7 @@ void mxs_i2c_reset(void)
        i2c_set_bus_speed(speed);
 }
 
-void mxs_i2c_setup_read(uint8_t chip, int len)
+static void mxs_i2c_setup_read(uint8_t chip, int len)
 {
        struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
 
@@ -77,7 +77,7 @@ void mxs_i2c_setup_read(uint8_t chip, int len)
        writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
 }
 
-void mxs_i2c_write(uchar chip, uint addr, int alen,
+static void mxs_i2c_write(uchar chip, uint addr, int alen,
                        uchar *buf, int blen, int stop)
 {
        struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
@@ -121,7 +121,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen,
        writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
 }
 
-int mxs_i2c_wait_for_ack(void)
+static int mxs_i2c_wait_for_ack(void)
 {
        struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
        uint32_t tmp;
index e1ad1e58ff63bbb4cbe95b3f8a742a480f4a878e..bf9d63e8952704c23adf0c42e5a60019a3dd82fa 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 #undef CONFIG_CMD_NET
index ba1532540e6b6e76bac3d2b97f69090b43ebb8d5..17fe88df4e24692071060f611b62e1fc2d127106 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 #undef CONFIG_CMD_NET
index 7d072153ee8295a4e1407152015c15c5d4d5031b..943b65841c611db084d2d7438ae22967042989a1 100644 (file)
 #define CONFIG_HARD_I2C
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
index 83a8b5d59feec8f5f01117e270f914e0d339d120..d926f740263e57491345a354c4c25931546c4138 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 /* TWL4030 */
index 721b91c4df91875470fa5e07b8e2465bf2e0cdb9..e68654f3baf7204cb0fcbb5864c6db1ad1280d42 100644 (file)
 #define CONFIG_HARD_I2C
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 /*
index f8131b1bafdc8fc8d1a23fa5fad4299a45ebe3ab..e59f41eccdc90acd989b3248b9bafab1a49723cc 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 /*
index 185faa7ef18c3d1bbb0711c71b48be211213bf64..1f09947706e924fa0ad0173b9bfeccd47521a489 100644 (file)
 #define CONFIG_HARD_I2C
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
 #define CONFIG_DRIVER_OMAP34XX_I2C
 
 /* RTC */
index d0daa455e5243ccbf616c4352a12e414319fe2ca..59255c4e267bd6376b523b459fded7b738c6a81d 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_I2C_MULTI_BUS           1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 #define CONFIG_VIDEO_OMAP3     /* DSS Support                  */
index 2ef3aaa18706d948f743487f9695d983100fffc7..b1f11c01c616ac82b99e6c7e399875eca021accb 100644 (file)
 
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 
 /*
  * PISMO support
index b2457d0bc6e72c9cb0f54a538c0b037c25245ce4..629118e44b5690691edd1d59416f9b9499685ee6 100644 (file)
 
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_I2C_MULTI_BUS
 
 /*
index 09a0b2f719203a372009d596edcdd4468a539b65..07de56567d3e8369a978c23e805a1c37cfc3aa57 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           0
-#define CONFIG_SYS_I2C_BUS             0 /* This isn't used anywhere ?? */
-#define CONFIG_SYS_I2C_BUS_SELECT      1 /* This isn't used anywhere ?? */
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 #define CONFIG_I2C_MULTI_BUS           1
 
index 217f306c0198374d649e109c7d8d4f491e362130..ee888418c59a84779622b9b47f6a88a7c744f706 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 /*
index b02ec850b7d3a23e772ce3cc7264d61eff0a9d7f..19c6a3d33a0096bec5bae9a8e423c7b828e605f2 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 /* OMITTED:  single 1 Gbit MT29F1G NAND flash */
index ee4cbd75c1bb77236babe59778c97015842ce4db..b48f21aa3e77205d98632260a973222046b563a3 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 /*
index a6b48a80ce42c58f8f2ffcd79bbcc7bf84c27f67..27527ce4c67c5579d87190a593704e2559590051 100644 (file)
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 /*
index a32369af3270b0df5eb6bfca83158146a386377e..ca4e724e8d3dc0a85a7d14facf32f65747cac77d 100644 (file)
@@ -91,8 +91,6 @@
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 #define CONFIG_I2C_MULTI_BUS           1
 
index 9f1fb9feef8f9df717d3d130b32d0e866b86d729..2af504baa42f4997651eb8e73846da5ee7d6ea55 100644 (file)
 #define CONFIG_HARD_I2C
 #define CONFIG_SYS_I2C_SPEED           400000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50            /* base address */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1               /* bytes of address */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW    0x07
index bcb0350b8c740b747606c5d07ab800fc2b1e414e..1a665ac3ac0b7737fc837ec1838ed3cdb7b7c2c2 100644 (file)
@@ -98,8 +98,6 @@
 #define CONFIG_HARD_I2C
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_SYS_I2C_BUS_SELECT      1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
 /* TWL4030 */