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Set/unset SRAM REQ ACK bit, based on CPU and AHB clocks in DRAM setup
author
Piotr Dymacz
<pepe2k@gmail.com>
Sun, 25 Sep 2016 21:01:46 +0000
(23:01 +0200)
committer
Piotr Dymacz
<pepe2k@gmail.com>
Sun, 25 Sep 2016 21:01:46 +0000
(23:01 +0200)
u-boot/cpu/mips/ar7240/qca_dram.c
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diff --git
a/u-boot/cpu/mips/ar7240/qca_dram.c
b/u-boot/cpu/mips/ar7240/qca_dram.c
index ad173ce12ee73fde250c86c3d1824f4b06a30330..86fc3f151bb382e8045339a057de23bc97920f89 100644
(file)
--- a/
u-boot/cpu/mips/ar7240/qca_dram.c
+++ b/
u-boot/cpu/mips/ar7240/qca_dram.c
@@
-833,6
+833,14
@@
void qca_dram_init(void)
/* If DDR_CLK < 2 * AHB_CLK, set DDR FSM wait control to 0xA24 */
if (ddr_clk < (2 * ahb_clk))
qca_soc_reg_write(QCA_DDR_FSM_WAIT_CTRL_REG, 0xA24);
+
+ /* If CPU clock < AHB clock, set SRAM REQ ACK */
+ if (cpu_clk < ahb_clk)
+ qca_soc_reg_read_set(QCA_DDR_CTRL_CFG_REG,
+ QCA_DDR_CTRL_CFG_SRAM_REQ_ACK_MASK);
+ else
+ qca_soc_reg_read_clear(QCA_DDR_CTRL_CFG_REG,
+ QCA_DDR_CTRL_CFG_SRAM_REQ_ACK_MASK);
#endif
/*