obj-y += lpc-uclass.o
obj-y += mpspec.o
obj-$(CONFIG_ENABLE_MRC_CACHE) += mrccache.o
-obj-y += cmd_mtrr.o
obj-y += northbridge-uclass.o
obj-$(CONFIG_I8259_PIC) += i8259.o
obj-$(CONFIG_I8254_TIMER) += i8254.o
+++ /dev/null
-/*
- * (C) Copyright 2014 Google, Inc
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/msr.h>
-#include <asm/mtrr.h>
-
-static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {
- "Uncacheable",
- "Combine",
- "2",
- "3",
- "Through",
- "Protect",
- "Back",
-};
-
-static int do_mtrr_list(void)
-{
- int i;
-
- printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||",
- "Mask ||", "Size ||");
- for (i = 0; i < MTRR_COUNT; i++) {
- const char *type = "Invalid";
- uint64_t base, mask, size;
- bool valid;
-
- base = native_read_msr(MTRR_PHYS_BASE_MSR(i));
- mask = native_read_msr(MTRR_PHYS_MASK_MSR(i));
- size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1);
- size |= (1 << 12) - 1;
- size += 1;
- valid = mask & MTRR_PHYS_MASK_VALID;
- type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK];
- printf("%d %-5s %-12s %016llx %016llx %016llx\n", i,
- valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK,
- mask & ~MTRR_PHYS_MASK_VALID, size);
- }
-
- return 0;
-}
-
-static int do_mtrr_set(uint reg, int argc, char * const argv[])
-{
- const char *typename = argv[0];
- struct mtrr_state state;
- uint32_t start, size;
- uint64_t base, mask;
- int i, type = -1;
- bool valid;
-
- if (argc < 3)
- return CMD_RET_USAGE;
- for (i = 0; i < MTRR_TYPE_COUNT; i++) {
- if (*typename == *mtrr_type_name[i])
- type = i;
- }
- if (type == -1) {
- printf("Invalid type name %s\n", typename);
- return CMD_RET_USAGE;
- }
- start = simple_strtoul(argv[1], NULL, 16);
- size = simple_strtoul(argv[2], NULL, 16);
-
- base = start | type;
- valid = native_read_msr(MTRR_PHYS_MASK_MSR(reg)) & MTRR_PHYS_MASK_VALID;
- mask = ~((uint64_t)size - 1);
- mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1;
- if (valid)
- mask |= MTRR_PHYS_MASK_VALID;
-
- printf("base=%llx, mask=%llx\n", base, mask);
- mtrr_open(&state);
- wrmsrl(MTRR_PHYS_BASE_MSR(reg), base);
- wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
- mtrr_close(&state);
-
- return 0;
-}
-
-static int mtrr_set_valid(int reg, bool valid)
-{
- struct mtrr_state state;
- uint64_t mask;
-
- mtrr_open(&state);
- mask = native_read_msr(MTRR_PHYS_MASK_MSR(reg));
- if (valid)
- mask |= MTRR_PHYS_MASK_VALID;
- else
- mask &= ~MTRR_PHYS_MASK_VALID;
- wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
- mtrr_close(&state);
-
- return 0;
-}
-
-static int do_mtrr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- const char *cmd;
- uint reg;
-
- cmd = argv[1];
- if (argc < 2 || *cmd == 'l')
- return do_mtrr_list();
- argc -= 2;
- argv += 2;
- if (argc <= 0)
- return CMD_RET_USAGE;
- reg = simple_strtoul(argv[0], NULL, 16);
- if (reg >= MTRR_COUNT) {
- printf("Invalid register number\n");
- return CMD_RET_USAGE;
- }
- if (*cmd == 'e')
- return mtrr_set_valid(reg, true);
- else if (*cmd == 'd')
- return mtrr_set_valid(reg, false);
- else if (*cmd == 's')
- return do_mtrr_set(reg, argc - 1, argv + 1);
- else
- return CMD_RET_USAGE;
-
- return 0;
-}
-
-U_BOOT_CMD(
- mtrr, 6, 1, do_mtrr,
- "Use x86 memory type range registers (32-bit only)",
- "[list] - list current registers\n"
- "set <reg> <type> <start> <size> - set a register\n"
- "\t<type> is Uncacheable, Combine, Through, Protect, Back\n"
- "disable <reg> - disable a register\n"
- "ensable <reg> - enable a register"
-);
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += cmd_fsp.o
obj-y += fsp_car.o
obj-y += fsp_common.o
obj-y += fsp_dram.o
+++ /dev/null
-/*
- * Copyright (C) 2014-2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/fsp/fsp_support.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static char *hob_type[] = {
- "reserved",
- "Hand-off",
- "Mem Alloc",
- "Res Desc",
- "GUID Ext",
- "FV",
- "CPU",
- "Mem Pool",
- "reserved",
- "FV2",
- "Load PEIM",
- "Capsule",
-};
-
-static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- struct fsp_header *hdr = find_fsp_header();
- u32 img_addr = hdr->img_base;
- char *sign = (char *)&hdr->sign;
- int i;
-
- printf("FSP : binary 0x%08x, header 0x%08x\n",
- CONFIG_FSP_ADDR, (int)hdr);
- printf("Header : sign ");
- for (i = 0; i < sizeof(hdr->sign); i++)
- printf("%c", *sign++);
- printf(", size %d, rev %d\n", hdr->hdr_len, hdr->hdr_rev);
- printf("Image : rev ");
- if (hdr->hdr_rev == FSP_HEADER_REVISION_1) {
- printf("%d.%d",
- (hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff);
- } else {
- printf("%d.%d.%d.%d",
- (hdr->img_rev >> 24) & 0xff, (hdr->img_rev >> 16) & 0xff,
- (hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff);
- }
- printf(", id ");
- for (i = 0; i < ARRAY_SIZE(hdr->img_id); i++)
- printf("%c", hdr->img_id[i]);
- printf(", addr 0x%08x, size %d\n", img_addr, hdr->img_size);
- if (hdr->hdr_rev == FSP_HEADER_REVISION_2) {
- printf("GFX :%ssupported\n",
- hdr->img_attr & FSP_ATTR_GRAPHICS_SUPPORT ? " " : " un");
- }
- printf("VPD : addr 0x%08x, size %d\n",
- hdr->cfg_region_off + img_addr, hdr->cfg_region_size);
- printf("\nNumber of APIs Supported : %d\n", hdr->api_num);
- printf("\tTempRamInit : 0x%08x\n", hdr->fsp_tempram_init + img_addr);
- printf("\tFspInit : 0x%08x\n", hdr->fsp_init + img_addr);
- printf("\tFspNotify : 0x%08x\n", hdr->fsp_notify + img_addr);
- if (hdr->hdr_rev == FSP_HEADER_REVISION_2) {
- printf("\tMemoryInit : 0x%08x\n",
- hdr->fsp_mem_init + img_addr);
- printf("\tTempRamExit : 0x%08x\n",
- hdr->fsp_tempram_exit + img_addr);
- printf("\tSiliconInit : 0x%08x\n",
- hdr->fsp_silicon_init + img_addr);
- }
-
- return 0;
-}
-
-static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- const struct hob_header *hdr;
- uint type;
- char *desc;
- int i = 0;
-
- hdr = gd->arch.hob_list;
-
- printf("HOB list address: 0x%08x\n\n", (unsigned int)hdr);
-
- printf("# | Address | Type | Len | ");
- printf("%42s\n", "GUID");
- printf("---|----------|-----------|------|-");
- printf("------------------------------------------\n");
- while (!end_of_hob(hdr)) {
- printf("%02x | %08x | ", i, (unsigned int)hdr);
- type = hdr->type;
- if (type == HOB_TYPE_UNUSED)
- desc = "*Unused*";
- else if (type == HOB_TYPE_EOH)
- desc = "*EOH*";
- else if (type >= 0 && type <= ARRAY_SIZE(hob_type))
- desc = hob_type[type];
- else
- desc = "*Invalid*";
- printf("%-9s | %04x | ", desc, hdr->len);
-
- if (type == HOB_TYPE_MEM_ALLOC || type == HOB_TYPE_RES_DESC ||
- type == HOB_TYPE_GUID_EXT) {
- struct efi_guid *guid = (struct efi_guid *)(hdr + 1);
- int j;
-
- printf("%08x-%04x-%04x", guid->data1,
- guid->data2, guid->data3);
- for (j = 0; j < ARRAY_SIZE(guid->data4); j++)
- printf("-%02x", guid->data4[j]);
- } else {
- printf("%42s", "Not Available");
- }
- printf("\n");
- hdr = get_next_hob(hdr);
- i++;
- }
-
- return 0;
-}
-
-static cmd_tbl_t fsp_commands[] = {
- U_BOOT_CMD_MKENT(hdr, 0, 1, do_hdr, "", ""),
- U_BOOT_CMD_MKENT(hob, 0, 1, do_hob, "", ""),
-};
-
-static int do_fsp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- cmd_tbl_t *fsp_cmd;
- int ret;
-
- if (argc < 2)
- return CMD_RET_USAGE;
- fsp_cmd = find_cmd_tbl(argv[1], fsp_commands, ARRAY_SIZE(fsp_commands));
- argc -= 2;
- argv += 2;
- if (!fsp_cmd || argc > fsp_cmd->maxargs)
- return CMD_RET_USAGE;
-
- ret = fsp_cmd->cmd(fsp_cmd, flag, argc, argv);
-
- return cmd_process_error(fsp_cmd, ret);
-}
-
-U_BOOT_CMD(
- fsp, 2, 1, do_fsp,
- "Show Intel Firmware Support Package (FSP) related information",
- "hdr - Print FSP header information\n"
- "fsp hob - Print FSP Hand-Off Block (HOB) information"
-);
obj-$(CONFIG_CMD_REGULATOR) += regulator.o
obj-$(CONFIG_CMD_BLOB) += blob.o
+
+obj-$(CONFIG_X86) += x86/
endif # !CONFIG_SPL_BUILD
# core command
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += mtrr.o
+obj-$(CONFIG_HAVE_FSP) += fsp.o
--- /dev/null
+/*
+ * Copyright (C) 2014-2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/fsp/fsp_support.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static char *hob_type[] = {
+ "reserved",
+ "Hand-off",
+ "Mem Alloc",
+ "Res Desc",
+ "GUID Ext",
+ "FV",
+ "CPU",
+ "Mem Pool",
+ "reserved",
+ "FV2",
+ "Load PEIM",
+ "Capsule",
+};
+
+static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ struct fsp_header *hdr = find_fsp_header();
+ u32 img_addr = hdr->img_base;
+ char *sign = (char *)&hdr->sign;
+ int i;
+
+ printf("FSP : binary 0x%08x, header 0x%08x\n",
+ CONFIG_FSP_ADDR, (int)hdr);
+ printf("Header : sign ");
+ for (i = 0; i < sizeof(hdr->sign); i++)
+ printf("%c", *sign++);
+ printf(", size %d, rev %d\n", hdr->hdr_len, hdr->hdr_rev);
+ printf("Image : rev ");
+ if (hdr->hdr_rev == FSP_HEADER_REVISION_1) {
+ printf("%d.%d",
+ (hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff);
+ } else {
+ printf("%d.%d.%d.%d",
+ (hdr->img_rev >> 24) & 0xff, (hdr->img_rev >> 16) & 0xff,
+ (hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff);
+ }
+ printf(", id ");
+ for (i = 0; i < ARRAY_SIZE(hdr->img_id); i++)
+ printf("%c", hdr->img_id[i]);
+ printf(", addr 0x%08x, size %d\n", img_addr, hdr->img_size);
+ if (hdr->hdr_rev == FSP_HEADER_REVISION_2) {
+ printf("GFX :%ssupported\n",
+ hdr->img_attr & FSP_ATTR_GRAPHICS_SUPPORT ? " " : " un");
+ }
+ printf("VPD : addr 0x%08x, size %d\n",
+ hdr->cfg_region_off + img_addr, hdr->cfg_region_size);
+ printf("\nNumber of APIs Supported : %d\n", hdr->api_num);
+ printf("\tTempRamInit : 0x%08x\n", hdr->fsp_tempram_init + img_addr);
+ printf("\tFspInit : 0x%08x\n", hdr->fsp_init + img_addr);
+ printf("\tFspNotify : 0x%08x\n", hdr->fsp_notify + img_addr);
+ if (hdr->hdr_rev == FSP_HEADER_REVISION_2) {
+ printf("\tMemoryInit : 0x%08x\n",
+ hdr->fsp_mem_init + img_addr);
+ printf("\tTempRamExit : 0x%08x\n",
+ hdr->fsp_tempram_exit + img_addr);
+ printf("\tSiliconInit : 0x%08x\n",
+ hdr->fsp_silicon_init + img_addr);
+ }
+
+ return 0;
+}
+
+static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ const struct hob_header *hdr;
+ uint type;
+ char *desc;
+ int i = 0;
+
+ hdr = gd->arch.hob_list;
+
+ printf("HOB list address: 0x%08x\n\n", (unsigned int)hdr);
+
+ printf("# | Address | Type | Len | ");
+ printf("%42s\n", "GUID");
+ printf("---|----------|-----------|------|-");
+ printf("------------------------------------------\n");
+ while (!end_of_hob(hdr)) {
+ printf("%02x | %08x | ", i, (unsigned int)hdr);
+ type = hdr->type;
+ if (type == HOB_TYPE_UNUSED)
+ desc = "*Unused*";
+ else if (type == HOB_TYPE_EOH)
+ desc = "*EOH*";
+ else if (type >= 0 && type <= ARRAY_SIZE(hob_type))
+ desc = hob_type[type];
+ else
+ desc = "*Invalid*";
+ printf("%-9s | %04x | ", desc, hdr->len);
+
+ if (type == HOB_TYPE_MEM_ALLOC || type == HOB_TYPE_RES_DESC ||
+ type == HOB_TYPE_GUID_EXT) {
+ struct efi_guid *guid = (struct efi_guid *)(hdr + 1);
+ int j;
+
+ printf("%08x-%04x-%04x", guid->data1,
+ guid->data2, guid->data3);
+ for (j = 0; j < ARRAY_SIZE(guid->data4); j++)
+ printf("-%02x", guid->data4[j]);
+ } else {
+ printf("%42s", "Not Available");
+ }
+ printf("\n");
+ hdr = get_next_hob(hdr);
+ i++;
+ }
+
+ return 0;
+}
+
+static cmd_tbl_t fsp_commands[] = {
+ U_BOOT_CMD_MKENT(hdr, 0, 1, do_hdr, "", ""),
+ U_BOOT_CMD_MKENT(hob, 0, 1, do_hob, "", ""),
+};
+
+static int do_fsp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ cmd_tbl_t *fsp_cmd;
+ int ret;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+ fsp_cmd = find_cmd_tbl(argv[1], fsp_commands, ARRAY_SIZE(fsp_commands));
+ argc -= 2;
+ argv += 2;
+ if (!fsp_cmd || argc > fsp_cmd->maxargs)
+ return CMD_RET_USAGE;
+
+ ret = fsp_cmd->cmd(fsp_cmd, flag, argc, argv);
+
+ return cmd_process_error(fsp_cmd, ret);
+}
+
+U_BOOT_CMD(
+ fsp, 2, 1, do_fsp,
+ "Show Intel Firmware Support Package (FSP) related information",
+ "hdr - Print FSP header information\n"
+ "fsp hob - Print FSP Hand-Off Block (HOB) information"
+);
--- /dev/null
+/*
+ * (C) Copyright 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/msr.h>
+#include <asm/mtrr.h>
+
+static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {
+ "Uncacheable",
+ "Combine",
+ "2",
+ "3",
+ "Through",
+ "Protect",
+ "Back",
+};
+
+static int do_mtrr_list(void)
+{
+ int i;
+
+ printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||",
+ "Mask ||", "Size ||");
+ for (i = 0; i < MTRR_COUNT; i++) {
+ const char *type = "Invalid";
+ uint64_t base, mask, size;
+ bool valid;
+
+ base = native_read_msr(MTRR_PHYS_BASE_MSR(i));
+ mask = native_read_msr(MTRR_PHYS_MASK_MSR(i));
+ size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1);
+ size |= (1 << 12) - 1;
+ size += 1;
+ valid = mask & MTRR_PHYS_MASK_VALID;
+ type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK];
+ printf("%d %-5s %-12s %016llx %016llx %016llx\n", i,
+ valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK,
+ mask & ~MTRR_PHYS_MASK_VALID, size);
+ }
+
+ return 0;
+}
+
+static int do_mtrr_set(uint reg, int argc, char * const argv[])
+{
+ const char *typename = argv[0];
+ struct mtrr_state state;
+ uint32_t start, size;
+ uint64_t base, mask;
+ int i, type = -1;
+ bool valid;
+
+ if (argc < 3)
+ return CMD_RET_USAGE;
+ for (i = 0; i < MTRR_TYPE_COUNT; i++) {
+ if (*typename == *mtrr_type_name[i])
+ type = i;
+ }
+ if (type == -1) {
+ printf("Invalid type name %s\n", typename);
+ return CMD_RET_USAGE;
+ }
+ start = simple_strtoul(argv[1], NULL, 16);
+ size = simple_strtoul(argv[2], NULL, 16);
+
+ base = start | type;
+ valid = native_read_msr(MTRR_PHYS_MASK_MSR(reg)) & MTRR_PHYS_MASK_VALID;
+ mask = ~((uint64_t)size - 1);
+ mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1;
+ if (valid)
+ mask |= MTRR_PHYS_MASK_VALID;
+
+ printf("base=%llx, mask=%llx\n", base, mask);
+ mtrr_open(&state);
+ wrmsrl(MTRR_PHYS_BASE_MSR(reg), base);
+ wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
+ mtrr_close(&state);
+
+ return 0;
+}
+
+static int mtrr_set_valid(int reg, bool valid)
+{
+ struct mtrr_state state;
+ uint64_t mask;
+
+ mtrr_open(&state);
+ mask = native_read_msr(MTRR_PHYS_MASK_MSR(reg));
+ if (valid)
+ mask |= MTRR_PHYS_MASK_VALID;
+ else
+ mask &= ~MTRR_PHYS_MASK_VALID;
+ wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
+ mtrr_close(&state);
+
+ return 0;
+}
+
+static int do_mtrr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ const char *cmd;
+ uint reg;
+
+ cmd = argv[1];
+ if (argc < 2 || *cmd == 'l')
+ return do_mtrr_list();
+ argc -= 2;
+ argv += 2;
+ if (argc <= 0)
+ return CMD_RET_USAGE;
+ reg = simple_strtoul(argv[0], NULL, 16);
+ if (reg >= MTRR_COUNT) {
+ printf("Invalid register number\n");
+ return CMD_RET_USAGE;
+ }
+ if (*cmd == 'e')
+ return mtrr_set_valid(reg, true);
+ else if (*cmd == 'd')
+ return mtrr_set_valid(reg, false);
+ else if (*cmd == 's')
+ return do_mtrr_set(reg, argc - 1, argv + 1);
+ else
+ return CMD_RET_USAGE;
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ mtrr, 6, 1, do_mtrr,
+ "Use x86 memory type range registers (32-bit only)",
+ "[list] - list current registers\n"
+ "set <reg> <type> <start> <size> - set a register\n"
+ "\t<type> is Uncacheable, Combine, Through, Protect, Back\n"
+ "disable <reg> - disable a register\n"
+ "ensable <reg> - enable a register"
+);
projects / oweals / u-boot.git / commitdiff