LS1046A BOARD
M: Mingkai Hu <mingkai.hu@nxp.com>
+M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
S: Maintained
F: board/freescale/ls1046ardb/
F: board/freescale/ls1046ardb/ls1046ardb.c
F: configs/ls1046ardb_qspi_spl_defconfig
F: configs/ls1046ardb_sdcard_defconfig
F: configs/ls1046ardb_emmc_defconfig
+F: configs/ls1046ardb_tfa_defconfig
LS1046A_SECURE_BOOT BOARD
M: Ruchika Gupta <ruchika.gupta@nxp.com>
popts->cpo_sample = 0x61;
}
+#ifdef CONFIG_TFABOOT
+int fsl_initdram(void)
+{
+ gd->ram_size = tfa_get_dram_size();
+
+ if (!gd->ram_size)
+ gd->ram_size = fsl_ddr_sdram_size();
+
+ return 0;
+}
+#else
int fsl_initdram(void)
{
phys_size_t dram_size;
return 0;
}
+#endif
--- /dev/null
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046ARDB=y
+CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_SECURE_BOOT=y
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_TFABOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_MISC_INIT_R=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_MP=y
+CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DM=y
+CONFIG_FSL_CAAM=y
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USB=y
+CONFIG_FSL_QSPI=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
--- /dev/null
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046ARDB=y
+CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_TFABOOT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_MISC_INIT_R=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_MP=y
+CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DM=y
+CONFIG_FSL_CAAM=y
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_QSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
+CONFIG_DM_SCSI=y
+CONFIG_SATA_CEVA=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SCSI=y
+CONFIG_AHCI=y
#include <asm/arch/stream_id_lsch2.h>
/* Link Definitions */
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
+#else
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
+#endif
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
#endif
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_FMAN_FW_ADDR 0x900000
+#define CONFIG_ENV_SPI_BUS 0
+#define CONFIG_ENV_SPI_CS 0
+#define CONFIG_ENV_SPI_MAX_HZ 1000000
+#define CONFIG_ENV_SPI_MODE 0x03
+#else
#ifdef CONFIG_SD_BOOT
/*
* PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
#endif
+#endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif
#define CONFIG_ENV_OVERWRITE
#endif
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
+#define CONFIG_ENV_OFFSET 0x500000 /* 5MB */
+#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
+#else
#if defined(CONFIG_SD_BOOT)
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
#endif
+#endif
#define AQR105_IRQ_MASK 0x80000000
/* FMan */
#ifndef SPL_NO_MISC
#undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_TFABOOT
+#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
+ "env exists secureboot && esbc_halt;;"
+#define SD_BOOTCOMMAND "run distro_bootcmd;run sd_bootcmd; " \
+ "env exists secureboot && esbc_halt;"
+#else
#if defined(CONFIG_QSPI_BOOT)
#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;;"
"env exists secureboot && esbc_halt;"
#endif
#endif
+#endif
#include <asm/fsl_secure_boot.h>