armv8: ls2080aqds: disable IFC NOR & QIXIS when QSPI enable
authorYuan Yao <yao.yuan@nxp.com>
Wed, 8 Jun 2016 10:24:54 +0000 (18:24 +0800)
committerYork Sun <york.sun@nxp.com>
Fri, 10 Jun 2016 20:44:59 +0000 (13:44 -0700)
When QSPI is enabled, NOR flash and QIXIS can't be accessed
through IFC due to pin mux. Enable I2C QIXIS access and I2C
early init to read the sysclk and ddrclk.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
board/freescale/ls2080aqds/ls2080aqds.c
include/configs/ls2080aqds.h

index b60206b4e44b02114e294ab45ddc25ddc3a714df..a07cd0a54e8dcaf6b351a96e2814493640d2b376 100644 (file)
@@ -219,6 +219,9 @@ int board_init(void)
 
 int board_early_init_f(void)
 {
+#ifdef CONFIG_SYS_I2C_EARLY_INIT
+       i2c_early_init_f();
+#endif
        fsl_lsch3_early_init_f();
 #ifdef CONFIG_FSL_QSPI
        /* input clk: 1/2 platform clk, output: input/20 */
index b44066c4073de376640cf3a5056828e91ae700d8..532a71590d613db58e291011efa887a2b74a9985 100644 (file)
@@ -17,6 +17,16 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 #define CONFIG_SYS_FSL_CLK
+
+#ifdef CONFIG_FSL_QSPI
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_QIXIS_I2C_ACCESS
+#define CONFIG_SYS_I2C_EARLY_INIT
+#define CONFIG_SYS_I2C_IFDR_DIV                0x7e
+#endif
+
+#define CONFIG_SYS_I2C_FPGA_ADDR       0x66
 #define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
 #define CONFIG_DDR_CLK_FREQ            get_board_ddr_clk()
 #define COUNTER_FREQUENCY_REAL         (CONFIG_SYS_CLK_FREQ/4)