AT91 rework: fix at91sam(9260/9g20/9xe)ek board port to build again:
authorReinhard Meyer <u-boot@emk-elektronik.de>
Mon, 6 Jun 2011 00:13:10 +0000 (00:13 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tue, 21 Jun 2011 20:26:22 +0000 (22:26 +0200)
Make ATMEL's at91sam9260/9g20/9xe-ek boards build again

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Makefile
board/atmel/at91sam9260ek/at91sam9260ek.c
board/atmel/at91sam9260ek/config.mk [deleted file]
board/atmel/at91sam9260ek/led.c
boards.cfg
include/configs/at91sam9260ek.h

index dcf5d937122a7ad742b739ddd14a7997b391df01..61ce415d666eaa0866529c54aec02b49bb6521d8 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -766,43 +766,6 @@ M5485HFE_config :  unconfig
 ## ARM926EJ-S Systems
 #########################################################################
 
-at91sam9260ek_nandflash_config \
-at91sam9260ek_dataflash_cs0_config \
-at91sam9260ek_dataflash_cs1_config \
-at91sam9260ek_config \
-at91sam9g20ek_nandflash_config \
-at91sam9g20ek_dataflash_cs0_config \
-at91sam9g20ek_dataflash_cs1_config \
-at91sam9g20ek_config   :       unconfig
-       @mkdir -p $(obj)include
-       @if [ "$(findstring 9g20,$@)" ] ; then \
-               echo "#define CONFIG_AT91SAM9G20EK 1"   >>$(obj)include/config.h ; \
-       else \
-               echo "#define CONFIG_AT91SAM9260EK 1"   >>$(obj)include/config.h ; \
-       fi;
-       @if [ "$(findstring _nandflash,$@)" ] ; then \
-               echo "#define CONFIG_SYS_USE_NANDFLASH 1"       >>$(obj)include/config.h ; \
-       elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
-               echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1"   >>$(obj)include/config.h ; \
-       else \
-               echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1"   >>$(obj)include/config.h ; \
-       fi;
-       @$(MKCONFIG) -n $@ -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
-
-at91sam9xeek_nandflash_config \
-at91sam9xeek_dataflash_cs0_config \
-at91sam9xeek_dataflash_cs1_config \
-at91sam9xeek_config    :       unconfig
-       @mkdir -p $(obj)include
-       @if [ "$(findstring _nandflash,$@)" ] ; then \
-               echo "#define CONFIG_SYS_USE_NANDFLASH 1"       >>$(obj)include/config.h ; \
-       elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
-               echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1"   >>$(obj)include/config.h ; \
-       else \
-               echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1"   >>$(obj)include/config.h ; \
-       fi;
-       @$(MKCONFIG) -n $@ -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
-
 at91sam9261ek_nandflash_config \
 at91sam9261ek_dataflash_cs0_config \
 at91sam9261ek_dataflash_cs3_config \
index 64c6d17829f5ac2e92838d8f2b07e952bff17534..b3ed91d432e7b130ab2d734013ec53ca7352d839 100644 (file)
  */
 
 #include <common.h>
-#include <asm/arch/at91sam9260.h>
+#include <asm/io.h>
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
-#include <asm/arch/hardware.h>
+
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
-#include <net.h>
+# include <net.h>
 #endif
 #include <netdev.h>
 
@@ -47,49 +46,53 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_CMD_NAND
 static void at91sam9260ek_nand_hw_init(void)
 {
+       struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+       struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
        unsigned long csa;
 
-       /* Enable CS3 */
-       csa = at91_sys_read(AT91_MATRIX_EBICSA);
-       at91_sys_write(AT91_MATRIX_EBICSA,
-                      csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+       /* Assign CS3 to NAND/SmartMedia Interface */
+       csa = readl(&matrix->ebicsa);
+       csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
+       writel(csa, &matrix->ebicsa);
 
        /* Configure SMC CS3 for NAND/SmartMedia */
-       at91_sys_write(AT91_SMC_SETUP(3),
-                      AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
-                      AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-       at91_sys_write(AT91_SMC_PULSE(3),
-                      AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-                      AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-       at91_sys_write(AT91_SMC_CYCLE(3),
-                      AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-       at91_sys_write(AT91_SMC_MODE(3),
-                      AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-                      AT91_SMC_EXNWMODE_DISABLE |
+       writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+               AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+               &smc->cs[3].setup);
+       writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+               AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+               &smc->cs[3].pulse);
+       writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+               &smc->cs[3].cycle);
+       writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+               AT91_SMC_MODE_EXNW_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
-                      AT91_SMC_DBW_16 |
+               AT91_SMC_MODE_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
-                      AT91_SMC_DBW_8 |
+               AT91_SMC_MODE_DBW_8 |
 #endif
-                      AT91_SMC_TDF_(2));
-
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
+               AT91_SMC_MODE_TDF_CYCLE(2),
+               &smc->cs[3].mode);
 
        /* Configure RDY/BSY */
        at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
        /* Enable NandFlash */
        at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+
 }
 #endif
 
 #ifdef CONFIG_MACB
 static void at91sam9260ek_macb_hw_init(void)
 {
-       unsigned long rstc;
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+       struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
+       struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
+       unsigned long erstl;
 
-       /* Enable clock */
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
+       /* Enable EMAC clock */
+       writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
 
        /*
         * Disable pull-up on:
@@ -103,48 +106,57 @@ static void at91sam9260ek_macb_hw_init(void)
         * PHY has internal pull-down
         */
        writel(pin_to_mask(AT91_PIN_PA14) |
-              pin_to_mask(AT91_PIN_PA15) |
-              pin_to_mask(AT91_PIN_PA17) |
-              pin_to_mask(AT91_PIN_PA25) |
-              pin_to_mask(AT91_PIN_PA26) |
-              pin_to_mask(AT91_PIN_PA28),
-              pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
+               pin_to_mask(AT91_PIN_PA15) |
+               pin_to_mask(AT91_PIN_PA17) |
+               pin_to_mask(AT91_PIN_PA25) |
+               pin_to_mask(AT91_PIN_PA26) |
+               pin_to_mask(AT91_PIN_PA28),
+               &pioa->pudr);
 
-       rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
+       erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
 
        /* Need to reset PHY -> 500ms reset */
-       at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-                                    (AT91_RSTC_ERSTL & (0x0D << 8)) |
-                                    AT91_RSTC_URSTEN);
+       writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
+               AT91_RSTC_MR_URSTEN, &rstc->mr);
 
-       at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
+       writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
 
        /* Wait for end hardware reset */
-       while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
+       while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
+               ;
 
        /* Restore NRST value */
-       at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-                                    (rstc) |
-                                    AT91_RSTC_URSTEN);
+       writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
+               &rstc->mr);
 
        /* Re-enable pull-up */
        writel(pin_to_mask(AT91_PIN_PA14) |
-              pin_to_mask(AT91_PIN_PA15) |
-              pin_to_mask(AT91_PIN_PA17) |
-              pin_to_mask(AT91_PIN_PA25) |
-              pin_to_mask(AT91_PIN_PA26) |
-              pin_to_mask(AT91_PIN_PA28),
-              pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
-
+               pin_to_mask(AT91_PIN_PA15) |
+               pin_to_mask(AT91_PIN_PA17) |
+               pin_to_mask(AT91_PIN_PA25) |
+               pin_to_mask(AT91_PIN_PA26) |
+               pin_to_mask(AT91_PIN_PA28),
+               &pioa->puer);
+
+       /* Initialize EMAC=MACB hardware */
        at91_macb_hw_init();
 }
 #endif
 
-int board_init(void)
+int board_early_init_f(void)
 {
-       /* Enable Ctrlc */
-       console_init_f();
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+       /* Enable clocks for all PIOs */
+       writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
+               (1 << ATMEL_ID_PIOC),
+               &pmc->pcer);
 
+       return 0;
+}
+
+int board_init(void)
+{
 #ifdef CONFIG_AT91SAM9G20EK
        /* arch number of AT91SAM9260EK-Board */
        gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
@@ -153,9 +165,9 @@ int board_init(void)
        gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK;
 #endif
        /* adress of boot parameters */
-       gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-       at91_serial_hw_init();
+       at91_seriald_hw_init();
 #ifdef CONFIG_CMD_NAND
        at91sam9260ek_nand_hw_init();
 #endif
@@ -171,8 +183,9 @@ int board_init(void)
 
 int dram_init(void)
 {
-       gd->bd->bi_dram[0].start = PHYS_SDRAM;
-       gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+       gd->ram_size = get_ram_size(
+               (void *)CONFIG_SYS_SDRAM_BASE,
+               CONFIG_SYS_SDRAM_SIZE);
        return 0;
 }
 
@@ -186,7 +199,7 @@ int board_eth_init(bd_t *bis)
 {
        int rc = 0;
 #ifdef CONFIG_MACB
-       rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
+       rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
 #endif
        return rc;
 }
diff --git a/board/atmel/at91sam9260ek/config.mk b/board/atmel/at91sam9260ek/config.mk
deleted file mode 100644 (file)
index e554a45..0000000
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x23f00000
index 2424d27fbd1a4ae271a2d843599c765139cbd2f6..daf81e805bb5de0de7f14e9d5764de82396283e5 100644 (file)
  */
 
 #include <common.h>
-#include <asm/arch/at91sam9260.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/io.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
 
 void coloured_LED_init(void)
 {
-       /* Enable clock */
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
-
+       /* Clock is enabled in board_early_init_f() */
        at91_set_gpio_output(CONFIG_RED_LED, 1);
        at91_set_gpio_output(CONFIG_GREEN_LED, 1);
 
index d2cacc8c1c29aba4e940d575b1eae856ffe358d6..ac20c817d3fa957d45868745a3466d10c5595d44 100644 (file)
@@ -74,6 +74,15 @@ omap1510inn                  arm         arm925t     -                   ti
 aspenite                     arm         arm926ejs   -                   Marvell        armada100
 afeb9260                     arm         arm926ejs   -                   -              at91
 at91cap9adk                  arm         arm926ejs   -                   atmel          at91
+at91sam9260ek_nandflash      arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH
+at91sam9260ek_dataflash_cs0  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0
+at91sam9260ek_dataflash_cs1  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1
+at91sam9g20ek_nandflash      arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH
+at91sam9g20ek_dataflash_cs0  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0
+at91sam9g20ek_dataflash_cs1  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1
+at91sam9xeek_nandflash       arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH
+at91sam9xeek_dataflash_cs0   arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0
+at91sam9xeek_dataflash_cs1   arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1
 snapper9260                  arm         arm926ejs   -                   bluewater      at91        snapper9260:AT91SAM9260
 snapper9g20                  arm         arm926ejs   snapper9260         bluewater      at91        snapper9260:AT91SAM9G20
 cpu9260                      arm         arm926ejs   cpu9260             eukrea         at91        cpu9260:CPU9260
index 5e7dee5299fed0438174957fe4a2473cdab8eaa1..88578c69472ac87f486af4a66097eceae3fdd900 100644 (file)
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_AT91_LEGACY
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
 
-/* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_MAIN_CLOCK     18432000        /* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ          1000
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * adapting the initial boot program.
+ * Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+#define CONFIG_SYS_TEXT_BASE           0x21f00000
 
-#define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK     32768           /* slow clock xtal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     18432000        /* main clock xtal */
+#define CONFIG_SYS_HZ                  1000
 
-#ifdef CONFIG_AT91SAM9G20EK
-#define CONFIG_AT91SAM9G20     1       /* It's an Atmel AT91SAM9G20 SoC*/
+/* Define actual evaluation board type from used processor type */
+#ifdef CONFIG_AT91SAM9G20
+# define CONFIG_AT91SAM9G20EK  /* It's an Atmel AT91SAM9G20 EK */
 #else
-#define CONFIG_AT91SAM9260     1       /* It's an Atmel AT91SAM9260 SoC*/
+# define CONFIG_AT91SAM9260EK  /* It's an Atmel AT91SAM9260 EK */
 #endif
 
+/* Misc CPU related */
 #define CONFIG_ARCH_CPU_INIT
-#undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff  */
-
-#define CONFIG_CMDLINE_TAG     1       /* enable passing of ATAGs      */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG      1
-
+#undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff  */
+#define CONFIG_CMDLINE_TAG             /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 #define CONFIG_SKIP_LOWLEVEL_INIT
-
-/*
- * Hardware drivers
- */
-#define CONFIG_AT91_GPIO       1
-#define CONFIG_ATMEL_USART     1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3          1       /* USART 3 is DBGU */
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
+
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY            /* required until (g)pio is fixed */
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP        1       /* keep pullups on peripheral pins */
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE              ATMEL_BASE_DBGU
+#define        CONFIG_USART_ID                 ATMEL_ID_SYS
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_BAUDRATE_TABLE      {115200 , 19200, 38400, 57600, 9600 }
 
 /* LED */
 #define CONFIG_AT91_LED
 #define CONFIG_CMD_NAND                1
 #define CONFIG_CMD_USB         1
 
-/* SDRAM */
+/*
+ * SDRAM: 1 bank, min 32, max 128 MB
+ * Initialized before u-boot gets started.
+ */
 #define CONFIG_NR_DRAM_BANKS           1
-#define PHYS_SDRAM                     0x20000000
-#define PHYS_SDRAM_SIZE                        0x04000000      /* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE          ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE          0x04000000
+
+/*
+ * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
+ * leaving the correct space for initial global data structure above
+ * that address while providing maximum stack area below.
+ */
+#ifdef CONFIG_AT91SAM9XE
+# define CONFIG_SYS_INIT_SP_ADDR \
+       (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
+#else
+# define CONFIG_SYS_INIT_SP_ADDR \
+       (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+#endif
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
-#define CONFIG_SYS_NAND_BASE                   0x40000000
-#define CONFIG_SYS_NAND_DBW_8                  1
-/* our ALE is AD21 */
-#define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
-/* our CLE is AD22 */
-#define CONFIG_SYS_NAND_MASK_CLE               (1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN             AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN              AT91_PIN_PC13
-
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
+#define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN      AT91_PIN_PC13
 #endif
 
 /* NOR flash - no real flash on this board */
 
 #define CONFIG_SYS_LOAD_ADDR                   0x22000000      /* load address */
 
-#define CONFIG_SYS_MEMTEST_START               PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START               CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END                 0x23e00000
 
 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 
 #endif
 
-#define CONFIG_BAUDRATE                115200
-#define CONFIG_SYS_BAUDRATE_TABLE      {115200 , 19200, 38400, 57600, 9600 }
-
 #define CONFIG_SYS_PROMPT              "U-Boot> "
 #define CONFIG_SYS_CBSIZE              256
 #define CONFIG_SYS_MAXARGS             16