configs: icore: Fix U-Boot proper loading from nand
authorMichael Trimarchi <michael@amarulasolutions.com>
Fri, 8 Mar 2019 07:35:03 +0000 (13:05 +0530)
committerStefano Babic <sbabic@denx.de>
Sun, 31 Mar 2019 18:04:31 +0000 (20:04 +0200)
SPL on Engicam i.Core M6 boards enabled DM, so it would require some
malloc() pool before relocation in order to load U-Boot proper properly.

So, enable SPL malloc() pool of 0x2000 size similarly like what we have
used for icore mmc defconfigs.

Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
configs/imx6dl_icore_nand_defconfig
configs/imx6q_icore_nand_defconfig

index c34c515080e9929ce93f16bff11bd1ad26ce68c0..69c45b948b3af93c61a0b70938d5baa65e449b54 100644 (file)
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
index cf149d615b3227868f823094c33c6c78d7ece437..b53a5010e5dd67943738ec9b797eace0b7dbfa03 100644 (file)
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y