mpc85xx: Initial SP alignment is wrong.
authorJoakim Tjernlund <joakim.tjernlund@transmode.se>
Mon, 23 Jul 2012 10:58:02 +0000 (10:58 +0000)
committerAndy Fleming <afleming@freescale.com>
Wed, 22 Aug 2012 21:07:42 +0000 (16:07 -0500)
PowerPC mandates SP to be 16 bytes aligned.
Furthermore, a stack frame is added, pointing to the reset vector
which may in the way when gdb is walking the stack because
the reset vector may not accessible depending on emulator settings.
Also use a temp register so gdb doesn't pick up intermediate values.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
arch/powerpc/cpu/mpc85xx/start.S

index 6aabc30c28305e61e1c8c41d0f3221cd460cbedf..b1998b215236a24fcefc93818fcffee8d797cdfd 100644 (file)
@@ -855,18 +855,12 @@ version_string:
        .globl  _start_cont
 _start_cont:
        /* Setup the stack in initial RAM,could be L2-as-SRAM or L1 dcache*/
-       lis     r1,CONFIG_SYS_INIT_RAM_ADDR@h
-       ori     r1,r1,CONFIG_SYS_INIT_SP_OFFSET@l
-
+       lis     r3,(CONFIG_SYS_INIT_RAM_ADDR)@h
+       ori     r3,r3,((CONFIG_SYS_INIT_SP_OFFSET-16)&~0xf)@l /* Align to 16 */
        li      r0,0
-       stwu    r0,-4(r1)
-       stwu    r0,-4(r1)               /* Terminate call chain */
-
-       stwu    r1,-8(r1)               /* Save back chain and move SP */
-       lis     r0,RESET_VECTOR@h       /* Address of reset vector */
-       ori     r0,r0,RESET_VECTOR@l
-       stwu    r1,-8(r1)               /* Save back chain and move SP */
-       stw     r0,+12(r1)              /* Save return addr (underflow vect) */
+       stw     r0,0(r3)        /* Terminate Back Chain */
+       stw     r0,+4(r3)       /* NULL return address. */
+       mr      r1,r3           /* Transfer to SP(r1) */
 
        GET_GOT
        bl      cpu_init_early_f