i2c, ppc4xx_i2c: switch to new multibus/multiadapter support
authorDirk Eibach <dirk.eibach@gdsys.cc>
Thu, 25 Apr 2013 02:40:01 +0000 (02:40 +0000)
committerHeiko Schocher <hs@denx.de>
Tue, 23 Jul 2013 06:34:56 +0000 (08:34 +0200)
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
98 files changed:
README
arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c
arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c
arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
arch/powerpc/cpu/ppc4xx/cmd_chip_config.c
arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
arch/powerpc/include/asm/ppc4xx-i2c.h
board/csb272/csb272.c
board/esd/du440/du440.c
board/lwmon5/kbd.c
board/mpl/pip405/pip405.c
board/sandburst/common/ppc440gx_i2c.c [deleted file]
board/sandburst/common/ppc440gx_i2c.h [deleted file]
board/sandburst/common/sb_common.c
board/sandburst/common/sb_common.h
board/sandburst/karef/Makefile
board/sandburst/karef/karef.c
board/sandburst/metrobox/Makefile
board/sandburst/metrobox/metrobox.c
drivers/i2c/Makefile
drivers/i2c/ppc4xx_i2c.c
include/configs/APC405.h
include/configs/ASH405.h
include/configs/CANBT.h
include/configs/CATcenter.h
include/configs/CMS700.h
include/configs/CPCI2DP.h
include/configs/CPCI405.h
include/configs/CPCI4052.h
include/configs/CPCI405AB.h
include/configs/CPCI405DT.h
include/configs/CPCIISER4.h
include/configs/CRAYL1.h
include/configs/DP405.h
include/configs/DU405.h
include/configs/DU440.h
include/configs/G2000.h
include/configs/HH405.h
include/configs/HUB405.h
include/configs/JSE.h
include/configs/KAREF.h
include/configs/METROBOX.h
include/configs/MIP405.h
include/configs/OCRTC.h
include/configs/ORSG.h
include/configs/PCI405.h
include/configs/PIP405.h
include/configs/PLU405.h
include/configs/PMC405.h
include/configs/PMC405DE.h
include/configs/PMC440.h
include/configs/PPChameleonEVB.h
include/configs/VOH405.h
include/configs/VOM405.h
include/configs/W7OLMC.h
include/configs/W7OLMG.h
include/configs/WUH405.h
include/configs/acadia.h
include/configs/alpr.h
include/configs/amcc-common.h
include/configs/bamboo.h
include/configs/bluestone.h
include/configs/bubinga.h
include/configs/canyonlands.h
include/configs/csb272.h
include/configs/csb472.h
include/configs/dlvision-10g.h
include/configs/dlvision.h
include/configs/ebony.h
include/configs/gdppc440etx.h
include/configs/icon.h
include/configs/intip.h
include/configs/io.h
include/configs/io64.h
include/configs/iocon.h
include/configs/katmai.h
include/configs/kilauea.h
include/configs/korat.h
include/configs/luan.h
include/configs/lwmon5.h
include/configs/makalu.h
include/configs/neo.h
include/configs/ocotea.h
include/configs/p3p440.h
include/configs/pcs440ep.h
include/configs/quad100hd.h
include/configs/redwood.h
include/configs/sbc405.h
include/configs/sc3.h
include/configs/sequoia.h
include/configs/t3corp.h
include/configs/taihu.h
include/configs/taishan.h
include/configs/walnut.h
include/configs/xpedite1000.h
include/configs/yosemite.h
include/configs/yucca.h
include/configs/zeus.h

diff --git a/README b/README
index c67106d9ade64599682cb33b6e30841cdc3b0826..d0aeb526209faa777254e495216a1171f0fb6f02 100644 (file)
--- a/README
+++ b/README
@@ -1985,6 +1985,11 @@ CBFS (Coreboot Filesystem) support
                 - This driver adds 4 i2c buses with a fix speed from
                   100000 and the slave addr 0!
 
+               - drivers/i2c/ppc4xx_i2c.c
+                 - activate this driver with CONFIG_SYS_I2C_PPC4XX
+                 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
+                 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
+
                additional defines:
 
                CONFIG_SYS_NUM_I2C_BUSES
index 48aa75391df739e46e98d5a5b04705b3ac1b8a40..fd458fdc9fbc028489a0e5faedee168f26d994f2 100644 (file)
 /*
  * Set default values
  */
-#ifndef CONFIG_SYS_I2C_SPEED
-#define CONFIG_SYS_I2C_SPEED   50000
-#endif
-
 #define ONE_BILLION    1000000000
 
 #define         SDRAM0_CFG_DCE         0x80000000
@@ -158,7 +154,7 @@ long int spd_sdram(int(read_spd)(uint addr))
                 * Make sure I2C controller is initialized
                 * before continuing.
                 */
-               i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+               i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
        }
 
        /* Make shure we are using SDRAM */
index 161d274dfff8ae8ee5e2c7dd1d5efa099f51d6d1..9c566c19f80d659c155722e660e415b0e327b7b3 100644 (file)
 /*
  * Set default values
  */
-#ifndef CONFIG_SYS_I2C_SPEED
-#define CONFIG_SYS_I2C_SPEED   50000
-#endif
-
 #define ONE_BILLION    1000000000
 
 /*
@@ -168,7 +164,7 @@ long int spd_sdram(void) {
         * Make sure I2C controller is initialized
         * before continuing.
         */
-       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
 
        /*
         * Read the SPD information using I2C interface. Check to see if the
index def7ebf7227961fbf37ac3dfe9b9cfe69c975f8d..a66973ee77bc009a947792175967e8b283ac1ef1 100644 (file)
@@ -459,8 +459,7 @@ phys_size_t initdram(int board_type)
         */
 
        /* switch to correct I2C bus */
-       I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
-       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
 
        /*------------------------------------------------------------------
         * Clear out the serial presence detect buffers.
index 72c5aec70663131419a73aa014f0a350c41b4791..0eafe3e067e2f9fd817c792c676ca1ba7dab0aa4 100644 (file)
@@ -56,7 +56,7 @@ static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const arg
         * First switch to correct I2C bus. This is I2C bus 0
         * for all currently available 4xx derivats.
         */
-       I2C_SET_BUS(0);
+       i2c_set_bus_num(0);
 
 #ifdef CONFIG_CMD_EEPROM
        ret = eeprom_read(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR,
index 3ceab32e4371164d14539bc68911624e4146108a..df9637504a9bf97b419a470e1b5451a977427a24 100644 (file)
@@ -1041,8 +1041,7 @@ phys_size_t initdram(int board_type)
         * before continuing.
         */
        /* switch to correct I2C bus */
-       I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
-       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
 
        /*------------------------------------------------------------------
         * Clear out the serial presence detect buffers.
index 0c6c926f73174bf0573889ab30e7037f3abf2518..89de5086eb35f2a39362b0591da139c26b7b5328 100644 (file)
 
 #define IIC_TIMEOUT    1               /* 1 second */
 
-#if defined(CONFIG_I2C_MULTI_BUS)
-#define I2C_BUS_OFFS   (i2c_bus_num * 0x100)
-#else
-#define I2C_BUS_OFFS   (0x000)
-#endif /* CONFIG_I2C_MULTI_BUS */
-
-#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
-    defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
-    defined(CONFIG_460EX) || defined(CONFIG_460GT)
-#define I2C_BASE_ADDR  (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + I2C_BUS_OFFS)
-#elif defined(CONFIG_440) || defined(CONFIG_405EX)
-/* all remaining 440 variants */
-#define I2C_BASE_ADDR  (CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + I2C_BUS_OFFS)
-#else
-/* all 405 variants */
-#define I2C_BASE_ADDR  (0xEF600500 + I2C_BUS_OFFS)
-#endif
-
 struct ppc4xx_i2c {
        u8 mdbuf;
        u8 res1;
index 8b36127e900cb9b1ba2a4c6ba15f352ad3c6bdf0..a53dac19e5da055a370dd1413b1878bc49a69dcf 100644 (file)
@@ -51,7 +51,7 @@ uchar pll_fs6377_regs[16] = {
  */
 int pll_init(void)
 {
-       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       i2c_set_bus_num(0);
 
        return  i2c_write(CONFIG_SYS_I2C_PLL_ADDR, 0, 1,
                (uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs));
index 1ada1bc98490787c883aa792dc037c85813b416f..64d43c505d67c07a99b48ab7bca421f7b29debb6 100644 (file)
@@ -385,7 +385,6 @@ int last_stage_init(void)
        return 0;
 }
 
-#if defined(CONFIG_I2C_MULTI_BUS)
 /*
  * read field strength from I2C ADC
  */
@@ -500,7 +499,6 @@ U_BOOT_CMD(
        "Initialize USB hub",
        ""
 );
-#endif /* CONFIG_I2C_MULTI_BUS */
 
 #define CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS 3
 int boot_eeprom_write (unsigned dev_addr,
index b66f681eeb748d0393152a89df68fb0989e31762..9834bfd1900b12e6475fb0dc1dda8bc5704bcf19 100644 (file)
@@ -111,7 +111,7 @@ static void kbd_init (void)
        uchar val, errcd;
        int i;
 
-       i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       i2c_set_bus_num(0);
 
        gd->arch.kbd_status = 0;
 
index b203037cf99a60867927cb7ff460ccd59866cca7..655e129f94d9b17fcf56ba248f97bda8b63f57f8 100644 (file)
@@ -209,7 +209,7 @@ int board_early_init_f (void)
 #endif
 
        /* Read Serial Presence Detect Information */
-       i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       i2c_set_bus_num(0);
        for (i = 0; i < 128; i++)
                datain[i] = 127;
        i2c_read(SPD_EEPROM_ADDRESS,0,1,datain,128);
diff --git a/board/sandburst/common/ppc440gx_i2c.c b/board/sandburst/common/ppc440gx_i2c.c
deleted file mode 100644 (file)
index 85b63fc..0000000
+++ /dev/null
@@ -1,510 +0,0 @@
-/*
- *  Copyright (C) 2005 Sandburst Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Ported from arch/powerpc/cpu/ppc4xx/i2c.c by AS HARNOIS by
- * Travis B. Sawyer
- * Sandburst Corporation.
- */
-#include <common.h>
-#include <asm/ppc4xx.h>
-#include <asm/ppc4xx-i2c.h>
-#include <i2c.h>
-#include <command.h>
-#include "ppc440gx_i2c.h"
-#include <asm/io.h>
-
-#ifdef CONFIG_I2C_BUS1
-
-#define IIC_OK         0
-#define IIC_NOK                1
-#define IIC_NOK_LA     2               /* Lost arbitration */
-#define IIC_NOK_ICT    3               /* Incomplete transfer */
-#define IIC_NOK_XFRA   4               /* Transfer aborted */
-#define IIC_NOK_DATA   5               /* No data in buffer */
-#define IIC_NOK_TOUT   6               /* Transfer timeout */
-
-#define IIC_TIMEOUT 1                  /* 1 second */
-#if defined(CONFIG_SYS_I2C_NOPROBES)
-static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
-#endif
-
-static struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_REGISTERS_BUS1_BASE_ADDRESS;
-
-static void _i2c_bus1_reset (void)
-{
-       int i, status;
-
-       /* Reset status register */
-       /* write 1 in SCMP and IRQA to clear these fields */
-       out_8 (IIC_STS1, 0x0A);
-
-       /* write 1 in IRQP IRQD LA ICT XFRA to clear these fields */
-       out_8 (IIC_EXTSTS1, 0x8F);
-       __asm__ volatile ("eieio");
-
-       /*
-        * Get current state, reset bus
-        * only if no transfers are pending.
-        */
-       i = 10;
-       do {
-               /* Get status */
-               status = in_8 (IIC_STS1);
-               udelay (500);                   /* 500us */
-               i--;
-       } while ((status & IIC_STS_PT) && (i > 0));
-       /* Soft reset controller */
-       status = in_8 (IIC_XTCNTLSS1);
-       out_8 (IIC_XTCNTLSS1, (status | IIC_XTCNTLSS_SRST));
-       __asm__ volatile ("eieio");
-
-       /* make sure where in initial state, data hi, clock hi */
-       out_8 (IIC_DIRECTCNTL1, 0xC);
-       for (i = 0; i < 10; i++) {
-               if ((in_8 (IIC_DIRECTCNTL1) & 0x3) != 0x3) {
-                       /* clock until we get to known state */
-                       out_8 (IIC_DIRECTCNTL1, 0x8);   /* clock lo */
-                       udelay (100);           /* 100us */
-                       out_8 (IIC_DIRECTCNTL1, 0xC);   /* clock hi */
-                       udelay (100);           /* 100us */
-               } else {
-                       break;
-               }
-       }
-       /* send start condition */
-       out_8 (IIC_DIRECTCNTL1, 0x4);
-       udelay (1000);                          /* 1ms */
-       /* send stop condition */
-       out_8 (IIC_DIRECTCNTL1, 0xC);
-       udelay (1000);                          /* 1ms */
-       /* Unreset controller */
-       out_8 (IIC_XTCNTLSS1, (status & ~IIC_XTCNTLSS_SRST));
-       udelay (1000);                          /* 1ms */
-}
-
-void i2c1_init (int speed, int slaveadd)
-{
-       sys_info_t sysInfo;
-       unsigned long freqOPB;
-       int val, divisor;
-
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-       /* call board specific i2c bus reset routine before accessing the   */
-       /* environment, which might be in a chip on that bus. For details   */
-       /* about this problem see doc/I2C_Edge_Conditions.                  */
-       i2c_init_board();
-#endif
-
-       /* Handle possible failed I2C state */
-       /* FIXME: put this into i2c_init_board()? */
-       _i2c_bus1_reset ();
-
-       /* clear lo master address */
-       out_8 (IIC_LMADR1, 0);
-
-       /* clear hi master address */
-       out_8 (IIC_HMADR1, 0);
-
-       /* clear lo slave address */
-       out_8 (IIC_LSADR1, 0);
-
-       /* clear hi slave address */
-       out_8 (IIC_HSADR1, 0);
-
-       /* Clock divide Register */
-       /* get OPB frequency */
-       get_sys_info (&sysInfo);
-       freqOPB = sysInfo.freqPLB / sysInfo.pllOpbDiv;
-       /* set divisor according to freqOPB */
-       divisor = (freqOPB - 1) / 10000000;
-       if (divisor == 0)
-               divisor = 1;
-       out_8 (IIC_CLKDIV1, divisor);
-
-       /* no interrupts */
-       out_8 (IIC_INTRMSK1, 0);
-
-       /* clear transfer count */
-       out_8 (IIC_XFRCNT1, 0);
-
-       /* clear extended control & stat */
-       /* write 1 in SRC SRS SWC SWS to clear these fields */
-       out_8 (IIC_XTCNTLSS1, 0xF0);
-
-       /* Mode Control Register
-          Flush Slave/Master data buffer */
-       out_8 (IIC_MDCNTL1, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
-       __asm__ volatile ("eieio");
-
-
-       val = in_8(IIC_MDCNTL1);
-       __asm__ volatile ("eieio");
-
-       /* Ignore General Call, slave transfers are ignored,
-          disable interrupts, exit unknown bus state, enable hold
-          SCL
-          100kHz normaly or FastMode for 400kHz and above
-       */
-
-       val |= IIC_MDCNTL_EUBS|IIC_MDCNTL_HSCL;
-       if( speed >= 400000 ){
-               val |= IIC_MDCNTL_FSM;
-       }
-       out_8 (IIC_MDCNTL1, val);
-
-       /* clear control reg */
-       out_8 (IIC_CNTL1, 0x00);
-       __asm__ volatile ("eieio");
-
-}
-
-/*
-  This code tries to use the features of the 405GP i2c
-  controller. It will transfer up to 4 bytes in one pass
-  on the loop. It only does out_8(lbz) to the buffer when it
-  is possible to do out16(lhz) transfers.
-
-  cmd_type is 0 for write 1 for read.
-
-  addr_len can take any value from 0-255, it is only limited
-  by the char, we could make it larger if needed. If it is
-  0 we skip the address write cycle.
-
-  Typical case is a Write of an addr followd by a Read. The
-  IBM FAQ does not cover this. On the last byte of the write
-  we don't set the creg CHT bit, and on the first bytes of the
-  read we set the RPST bit.
-
-  It does not support address only transfers, there must be
-  a data part. If you want to write the address yourself, put
-  it in the data pointer.
-
-  It does not support transfer to/from address 0.
-
-  It does not check XFRCNT.
-*/
-static
-int i2c_transfer1(unsigned char cmd_type,
-                 unsigned char chip,
-                 unsigned char addr[],
-                 unsigned char addr_len,
-                 unsigned char data[],
-                 unsigned short data_len )
-{
-       unsigned char* ptr;
-       int reading;
-       int tran,cnt;
-       int result;
-       int status;
-       int i;
-       uchar creg;
-
-       if( data == 0 || data_len == 0 ){
-               /*Don't support data transfer of no length or to address 0*/
-               printf( "i2c_transfer: bad call\n" );
-               return IIC_NOK;
-       }
-       if( addr && addr_len ){
-               ptr = addr;
-               cnt = addr_len;
-               reading = 0;
-       }else{
-               ptr = data;
-               cnt = data_len;
-               reading = cmd_type;
-       }
-
-       /*Clear Stop Complete Bit*/
-       out_8(IIC_STS1,IIC_STS_SCMP);
-       /* Check init */
-       i=10;
-       do {
-               /* Get status */
-               status = in_8(IIC_STS1);
-               __asm__ volatile("eieio");
-               i--;
-       } while ((status & IIC_STS_PT) && (i>0));
-
-       if (status & IIC_STS_PT) {
-               result = IIC_NOK_TOUT;
-               return(result);
-       }
-       /*flush the Master/Slave Databuffers*/
-       out_8(IIC_MDCNTL1, ((in_8(IIC_MDCNTL1))|IIC_MDCNTL_FMDB|IIC_MDCNTL_FSDB));
-       /*need to wait 4 OPB clocks? code below should take that long*/
-
-       /* 7-bit adressing */
-       out_8(IIC_HMADR1,0);
-       out_8(IIC_LMADR1, chip);
-       __asm__ volatile("eieio");
-
-       tran = 0;
-       result = IIC_OK;
-       creg = 0;
-
-       while ( tran != cnt && (result == IIC_OK)) {
-               int  bc,j;
-
-               /* Control register =
-                  Normal transfer, 7-bits adressing, Transfer up to bc bytes, Normal start,
-                  Transfer is a sequence of transfers
-               */
-               creg |= IIC_CNTL_PT;
-
-               bc = (cnt - tran) > 4 ? 4 :
-                       cnt - tran;
-               creg |= (bc-1)<<4;
-               /* if the real cmd type is write continue trans*/
-               if ( (!cmd_type && (ptr == addr)) || ((tran+bc) != cnt) )
-                       creg |= IIC_CNTL_CHT;
-
-               if (reading)
-                       creg |= IIC_CNTL_READ;
-               else {
-                       for(j=0; j<bc; j++) {
-                               /* Set buffer */
-                               out_8(IIC_MDBUF1,ptr[tran+j]);
-                               __asm__ volatile("eieio");
-                       }
-               }
-               out_8(IIC_CNTL1, creg );
-               __asm__ volatile("eieio");
-
-               /* Transfer is in progress
-                  we have to wait for upto 5 bytes of data
-                  1 byte chip address+r/w bit then bc bytes
-                  of data.
-                  udelay(10) is 1 bit time at 100khz
-                  Doubled for slop. 20 is too small.
-               */
-               i=2*5*8;
-               do {
-                       /* Get status */
-                       status = in_8(IIC_STS1);
-                       __asm__ volatile("eieio");
-                       udelay (10);
-                       i--;
-               } while ((status & IIC_STS_PT) && !(status & IIC_STS_ERR)
-                        && (i>0));
-
-               if (status & IIC_STS_ERR) {
-                       result = IIC_NOK;
-                       status = in_8 (IIC_EXTSTS1);
-                       /* Lost arbitration? */
-                       if (status & IIC_EXTSTS_LA)
-                               result = IIC_NOK_LA;
-                       /* Incomplete transfer? */
-                       if (status & IIC_EXTSTS_ICT)
-                               result = IIC_NOK_ICT;
-                       /* Transfer aborted? */
-                       if (status & IIC_EXTSTS_XFRA)
-                               result = IIC_NOK_XFRA;
-               } else if ( status & IIC_STS_PT) {
-                       result = IIC_NOK_TOUT;
-               }
-               /* Command is reading => get buffer */
-               if ((reading) && (result == IIC_OK)) {
-                       /* Are there data in buffer */
-                       if (status & IIC_STS_MDBS) {
-                               /*
-                                 even if we have data we have to wait 4OPB clocks
-                                 for it to hit the front of the FIFO, after that
-                                 we can just read. We should check XFCNT here and
-                                 if the FIFO is full there is no need to wait.
-                               */
-                               udelay (1);
-                               for(j=0;j<bc;j++) {
-                                       ptr[tran+j] = in_8(IIC_MDBUF1);
-                                       __asm__ volatile("eieio");
-                               }
-                       } else
-                               result = IIC_NOK_DATA;
-               }
-               creg = 0;
-               tran+=bc;
-               if( ptr == addr && tran == cnt ) {
-                       ptr = data;
-                       cnt = data_len;
-                       tran = 0;
-                       reading = cmd_type;
-                       if( reading )
-                               creg = IIC_CNTL_RPST;
-               }
-       }
-       return (result);
-}
-
-int i2c_probe1 (uchar chip)
-{
-       uchar buf[1];
-
-       buf[0] = 0;
-
-       /*
-        * What is needed is to send the chip address and verify that the
-        * address was <ACK>ed (i.e. there was a chip at that address which
-        * drove the data line low).
-        */
-       return(i2c_transfer1 (1, chip << 1, 0,0, buf, 1) != 0);
-}
-
-
-int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
-       uchar xaddr[4];
-       int ret;
-
-       if ( alen > 4 ) {
-               printf ("I2C read: addr len %d not supported\n", alen);
-               return 1;
-       }
-
-       if ( alen > 0 ) {
-               xaddr[0] = (addr >> 24) & 0xFF;
-               xaddr[1] = (addr >> 16) & 0xFF;
-               xaddr[2] = (addr >> 8) & 0xFF;
-               xaddr[3] = addr & 0xFF;
-       }
-
-
-#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
-       /*
-        * EEPROM chips that implement "address overflow" are ones
-        * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
-        * address and the extra bits end up in the "chip address"
-        * bit slots. This makes a 24WC08 (1Kbyte) chip look like
-        * four 256 byte chips.
-        *
-        * Note that we consider the length of the address field to
-        * still be one byte because the extra address bits are
-        * hidden in the chip address.
-        */
-       if( alen > 0 )
-               chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
-#endif
-       if( (ret = i2c_transfer1( 1, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) {
-               printf( "I2c read: failed %d\n", ret);
-               return 1;
-       }
-       return 0;
-}
-
-int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
-       uchar xaddr[4];
-
-       if ( alen > 4 ) {
-               printf ("I2C write: addr len %d not supported\n", alen);
-               return 1;
-
-       }
-       if ( alen > 0 ) {
-               xaddr[0] = (addr >> 24) & 0xFF;
-               xaddr[1] = (addr >> 16) & 0xFF;
-               xaddr[2] = (addr >> 8) & 0xFF;
-               xaddr[3] = addr & 0xFF;
-       }
-
-#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
-       /*
-        * EEPROM chips that implement "address overflow" are ones
-        * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
-        * address and the extra bits end up in the "chip address"
-        * bit slots. This makes a 24WC08 (1Kbyte) chip look like
-        * four 256 byte chips.
-        *
-        * Note that we consider the length of the address field to
-        * still be one byte because the extra address bits are
-        * hidden in the chip address.
-        */
-       if( alen > 0 )
-               chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
-#endif
-
-       return (i2c_transfer1( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0);
-}
-
-/*-----------------------------------------------------------------------
- * Read a register
- */
-uchar i2c_reg_read1(uchar i2c_addr, uchar reg)
-{
-       uchar buf;
-
-       i2c_read1(i2c_addr, reg, 1, &buf, (uchar)1);
-
-       return(buf);
-}
-
-/*-----------------------------------------------------------------------
- * Write a register
- */
-void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val)
-{
-       i2c_write1(i2c_addr, reg, 1, &val, 1);
-}
-
-
-int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-       int j;
-#if defined(CONFIG_SYS_I2C_NOPROBES)
-       int k, skip;
-#endif
-
-       puts ("Valid chip addresses:");
-       for(j = 0; j < 128; j++) {
-#if defined(CONFIG_SYS_I2C_NOPROBES)
-               skip = 0;
-               for (k = 0; k < sizeof(i2c_no_probes); k++){
-                       if (j == i2c_no_probes[k]){
-                               skip = 1;
-                               break;
-                       }
-               }
-               if (skip)
-                       continue;
-#endif
-               if(i2c_probe1(j) == 0) {
-                       printf(" %02X", j);
-               }
-       }
-       putc ('\n');
-
-#if defined(CONFIG_SYS_I2C_NOPROBES)
-       puts ("Excluded chip addresses:");
-       for( k = 0; k < sizeof(i2c_no_probes); k++ )
-               printf(" %02X", i2c_no_probes[k] );
-       putc ('\n');
-#endif
-
-       return 0;
-}
-
-U_BOOT_CMD(
-       iprobe1,        1,      1,      do_i2c1_probe,
-       "probe to discover valid I2C chip addresses",
-       ""
-);
-
-#endif /* CONFIG_I2C_BUS1 */
diff --git a/board/sandburst/common/ppc440gx_i2c.h b/board/sandburst/common/ppc440gx_i2c.h
deleted file mode 100644 (file)
index 7496db4..0000000
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- *  Copyright (C) 2005 Sandburst Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Ported from i2c driver for ppc4xx by AS HARNOIS by
- * Travis B. Sawyer
- * Sandburst Corporation
- */
-#include <common.h>
-#include <asm/ppc4xx.h>
-#include <asm/ppc4xx-i2c.h>
-#include <i2c.h>
-
-#ifdef CONFIG_HARD_I2C
-
-#define I2C_BUS1_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
-#define           I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR
-#define    IIC_MDBUF1  (&i2c->mdbuf)
-#define    IIC_SDBUF1  (&i2c->sdbuf)
-#define    IIC_LMADR1  (&i2c->lmadr)
-#define    IIC_HMADR1  (&i2c->hmadr)
-#define    IIC_CNTL1   (&i2c->cntl)
-#define    IIC_MDCNTL1 (&i2c->mdcntl)
-#define    IIC_STS1    (&i2c->sts)
-#define    IIC_EXTSTS1 (&i2c->extsts)
-#define    IIC_LSADR1  (&i2c->lsadr)
-#define    IIC_HSADR1  (&i2c->hsadr)
-#define    IIC_CLKDIV1 (&i2c->clkdiv)
-#define    IIC_INTRMSK1        (&i2c->intrmsk)
-#define    IIC_XFRCNT1 (&i2c->xfrcnt)
-#define    IIC_XTCNTLSS1       (&i2c->xtcntlss)
-#define    IIC_DIRECTCNTL1 (&i2c->directcntl)
-
-void i2c1_init (int speed, int slaveadd);
-int i2c_probe1 (uchar chip);
-int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
-int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
-uchar i2c_reg_read1(uchar i2c_addr, uchar reg);
-void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val);
-
-#endif /* CONFIG_HARD_I2C */
index 6b910743d52fc5f8a8c3822a9d0e09e8fce266eb..305e110b1745aa38299811075c5bab0d4f1961b5 100644 (file)
@@ -26,7 +26,6 @@
 #include <asm/io.h>
 #include <spd_sdram.h>
 #include <i2c.h>
-#include "ppc440gx_i2c.h"
 #include "sb_common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -84,7 +83,7 @@ unsigned short sbcommon_get_serial_number(void)
 
        /* Get the board serial number from eeprom */
        /* Initialize I2C */
-       i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       i2c_set_bus_num(0);
 
        /* Read 256 bytes in EEPROM */
        i2c_read (0x50, 0, 1, buff, 0x100);
@@ -110,85 +109,87 @@ void sbcommon_fans(void)
         * Attempt to turn on 2 of the fans...
         * Need to go through the bridge
         */
+       i2c_set_bus_num(1);
        puts ("FANS:  ");
 
        /* select fan4 through the bridge */
-       i2c_reg_write1(0x73, /* addr */
-                      0x00, /* reg */
-                      0x08); /* val = bus 4 */
+       i2c_reg_write(0x73, /* addr */
+                     0x00, /* reg */
+                     0x08); /* val = bus 4 */
 
        /* Turn on FAN 4 */
-       i2c_reg_write1(0x2e,
-                      1,
-                      0x80);
+       i2c_reg_write(0x2e,
+                     1,
+                     0x80);
 
-       i2c_reg_write1(0x2e,
-                      0,
-                      0x19);
+       i2c_reg_write(0x2e,
+                     0,
+                     0x19);
 
        /* Deselect bus 4 on the bridge */
-       i2c_reg_write1(0x73,
-                      0x00,
-                      0x00);
+       i2c_reg_write(0x73,
+                     0x00,
+                     0x00);
 
        /* select fan3 through the bridge */
-       i2c_reg_write1(0x73, /* addr */
-                      0x00, /* reg */
-                      0x04); /* val = bus 3 */
+       i2c_reg_write(0x73, /* addr */
+                     0x00, /* reg */
+                     0x04); /* val = bus 3 */
 
        /* Turn on FAN 3 */
-       i2c_reg_write1(0x2e,
-                      1,
-                      0x80);
+       i2c_reg_write(0x2e,
+                     1,
+                     0x80);
 
-       i2c_reg_write1(0x2e,
-                      0,
-                      0x19);
+       i2c_reg_write(0x2e,
+                     0,
+                     0x19);
 
        /* Deselect bus 3 on the bridge */
-       i2c_reg_write1(0x73,
-                      0x00,
-                      0x00);
+       i2c_reg_write(0x73,
+                     0x00,
+                     0x00);
 
        /* select fan2 through the bridge */
-       i2c_reg_write1(0x73, /* addr */
-                      0x00, /* reg */
-                      0x02); /* val = bus 4 */
+       i2c_reg_write(0x73, /* addr */
+                     0x00, /* reg */
+                     0x02); /* val = bus 4 */
 
        /* Turn on FAN 2 */
-       i2c_reg_write1(0x2e,
-                      1,
-                      0x80);
+       i2c_reg_write(0x2e,
+                     1,
+                     0x80);
 
-       i2c_reg_write1(0x2e,
-                      0,
-                      0x19);
+       i2c_reg_write(0x2e,
+                     0,
+                     0x19);
 
        /* Deselect bus 2 on the bridge */
-       i2c_reg_write1(0x73,
-                      0x00,
-                      0x00);
+       i2c_reg_write(0x73,
+                     0x00,
+                     0x00);
 
        /* select fan1 through the bridge */
-       i2c_reg_write1(0x73, /* addr */
-                      0x00, /* reg */
-                      0x01); /* val = bus 0 */
+       i2c_reg_write(0x73, /* addr */
+                     0x00, /* reg */
+                     0x01); /* val = bus 0 */
 
        /* Turn on FAN 1 */
-       i2c_reg_write1(0x2e,
-                      1,
-                      0x80);
+       i2c_reg_write(0x2e,
+                     1,
+                     0x80);
 
-       i2c_reg_write1(0x2e,
-                      0,
-                      0x19);
+       i2c_reg_write(0x2e,
+                     0,
+                     0x19);
 
        /* Deselect bus 1 on the bridge */
-       i2c_reg_write1(0x73,
-                      0x00,
-                      0x00);
+       i2c_reg_write(0x73,
+                     0x00,
+                     0x00);
 
        puts ("on\n");
+       i2c_set_bus_num(0);
 
        return;
 
@@ -319,7 +320,7 @@ void board_get_enetaddr(int macaddr_idx, uchar *enet)
        if (0 == macaddr_idx) {
 
                /* Initialize I2C */
-               i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+               i2c_set_bus_num(0);
 
                /* Read 256 bytes in EEPROM */
                i2c_read (0x50, 0, 1, buff, 0x100);
index e652ba8ed8332feda431bad9f09e9a4d27c7684d..5b28244440e8ae5616fbc97168936c797c160810 100644 (file)
@@ -28,7 +28,6 @@
 #include <asm/io.h>
 #include <spd_sdram.h>
 #include <i2c.h>
-#include "ppc440gx_i2c.h"
 
 /*
  * GPIO Settings
index fe9b5147614ea3195629825105b86974342f70c6..d9b317098d05b87692b4f4d12e40978003f11e1e 100644 (file)
@@ -40,8 +40,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
 
 LIB    = $(obj)lib$(BOARD).o
 
-COBJS  = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \
-       ../common/sb_common.o
+COBJS  = $(BOARD).o ../common/flash.o ../common/sb_common.o
 
 SOBJS  = init.o
 
index 186998d1dfc3eb819590f55fe0f6b61f009c1069..d156844ea95cbbc8ee4049489b147c12e58ba9da 100644 (file)
@@ -337,11 +337,6 @@ int checkboard (void)
  ************************************************************************/
 int misc_init_f (void)
 {
-       /* Turn on i2c bus 1 */
-       puts ("I2C1:  ");
-       i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-       puts ("ready\n");
-
        /* Turn on fans 3 & 4 */
        sbcommon_fans();
 
index 6019d5963c602257d2f153378de8b4d0a05d79a9..3f19bf2bd69d9e97ef23ae691e5880f564ec80d7 100644 (file)
@@ -39,8 +39,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
 
 LIB    = $(obj)lib$(BOARD).o
 
-COBJS  = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \
-       ../common/sb_common.o
+COBJS  = $(BOARD).o ../common/flash.o ../common/sb_common.o
 SOBJS  = init.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
index 76d8293fd67db21339c26407fce0d3e46a7d945e..ce4a0296ec16d73abf3f64d35729dbdcd24f1d0b 100644 (file)
@@ -30,7 +30,6 @@
 #include <asm/io.h>
 #include <spd_sdram.h>
 #include <i2c.h>
-#include "../common/ppc440gx_i2c.h"
 #include "../common/sb_common.h"
 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \
     defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
@@ -305,11 +304,6 @@ int checkboard (void)
  ************************************************************************/
 int misc_init_f (void)
 {
-       /* Turn on i2c bus 1 */
-       puts ("I2C1:  ");
-       i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-       puts ("ready\n");
-
        /* Turn on fans */
        sbcommon_fans();
 
index e1da58d7bc1677555d263aa80ae589556e8a7961..360f93edf7d768b18b9a249c3faa03d404b063ef 100644 (file)
@@ -36,7 +36,6 @@ COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
 COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
-COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o
 COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
 COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
 COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
@@ -45,6 +44,7 @@ COBJS-$(CONFIG_SH_I2C) += sh_i2c.o
 COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
 COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
 COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
+COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
 COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
 COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
 COBJS-$(CONFIG_ZYNQ_I2C) += zynq_i2c.o
index 53fedd594cbcb26c2613ea59559d86f3faecc4ec..c924874b599d20de6aaee77483f07721e5412386 100644 (file)
 #include <i2c.h>
 #include <asm/io.h>
 
-#ifdef CONFIG_HARD_I2C
-
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_I2C_MULTI_BUS)
-/*
- * Initialize the bus pointer to whatever one the SPD EEPROM is on.
- * Default is bus 0.  This is necessary because the DDR initialization
- * runs from ROM, and we can't switch buses because we can't modify
- * the global variables.
- */
-#ifndef CONFIG_SYS_SPD_BUS_NUM
-#define CONFIG_SYS_SPD_BUS_NUM 0
+static inline struct ppc4xx_i2c *ppc4xx_get_i2c(int hwadapnr)
+{
+       unsigned long base;
+
+#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+       defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+       defined(CONFIG_460EX) || defined(CONFIG_460GT)
+       base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + (hwadapnr * 0x100);
+#elif defined(CONFIG_440) || defined(CONFIG_405EX)
+/* all remaining 440 variants */
+       base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + (hwadapnr * 0x100);
+#else
+/* all 405 variants */
+       base = 0xEF600500 + (hwadapnr * 0x100);
 #endif
-static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
-       CONFIG_SYS_SPD_BUS_NUM;
-#endif /* CONFIG_I2C_MULTI_BUS */
+       return (struct ppc4xx_i2c *)base;
+}
 
-static void _i2c_bus_reset(void)
+static void _i2c_bus_reset(struct i2c_adapter *adap)
 {
-       struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
+       struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
        int i;
        u8 dc;
 
@@ -91,11 +93,10 @@ static void _i2c_bus_reset(void)
        out_8(&i2c->xtcntlss, 0);
 }
 
-void i2c_init(int speed, int slaveaddr)
+static void ppc4xx_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
 {
-       struct ppc4xx_i2c *i2c;
+       struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
        int val, divisor;
-       int bus;
 
 #ifdef CONFIG_SYS_I2C_INIT_BOARD
        /*
@@ -106,67 +107,57 @@ void i2c_init(int speed, int slaveaddr)
        i2c_init_board();
 #endif
 
-       for (bus = 0; bus < CONFIG_SYS_MAX_I2C_BUS; bus++) {
-               I2C_SET_BUS(bus);
-
-               /* Set i2c pointer after calling I2C_SET_BUS() */
-               i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
-
-               /* Handle possible failed I2C state */
-               /* FIXME: put this into i2c_init_board()? */
-               _i2c_bus_reset();
+       /* Handle possible failed I2C state */
+       /* FIXME: put this into i2c_init_board()? */
+       _i2c_bus_reset(adap);
 
-               /* clear lo master address */
-               out_8(&i2c->lmadr, 0);
+       /* clear lo master address */
+       out_8(&i2c->lmadr, 0);
 
-               /* clear hi master address */
-               out_8(&i2c->hmadr, 0);
-
-               /* clear lo slave address */
-               out_8(&i2c->lsadr, 0);
+       /* clear hi master address */
+       out_8(&i2c->hmadr, 0);
 
-               /* clear hi slave address */
-               out_8(&i2c->hsadr, 0);
+       /* clear lo slave address */
+       out_8(&i2c->lsadr, 0);
 
-               /* Clock divide Register */
-               /* set divisor according to freq_opb */
-               divisor = (get_OPB_freq() - 1) / 10000000;
-               if (divisor == 0)
-                       divisor = 1;
-               out_8(&i2c->clkdiv, divisor);
+       /* clear hi slave address */
+       out_8(&i2c->hsadr, 0);
 
-               /* no interrupts */
-               out_8(&i2c->intrmsk, 0);
+       /* Clock divide Register */
+       /* set divisor according to freq_opb */
+       divisor = (get_OPB_freq() - 1) / 10000000;
+       if (divisor == 0)
+               divisor = 1;
+       out_8(&i2c->clkdiv, divisor);
 
-               /* clear transfer count */
-               out_8(&i2c->xfrcnt, 0);
+       /* no interrupts */
+       out_8(&i2c->intrmsk, 0);
 
-               /* clear extended control & stat */
-               /* write 1 in SRC SRS SWC SWS to clear these fields */
-               out_8(&i2c->xtcntlss, 0xF0);
+       /* clear transfer count */
+       out_8(&i2c->xfrcnt, 0);
 
-               /* Mode Control Register
-                  Flush Slave/Master data buffer */
-               out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
+       /* clear extended control & stat */
+       /* write 1 in SRC SRS SWC SWS to clear these fields */
+       out_8(&i2c->xtcntlss, 0xF0);
 
-               val = in_8(&i2c->mdcntl);
+       /* Mode Control Register
+          Flush Slave/Master data buffer */
+       out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
 
-               /* Ignore General Call, slave transfers are ignored,
-                * disable interrupts, exit unknown bus state, enable hold
-                * SCL 100kHz normaly or FastMode for 400kHz and above
-                */
+       val = in_8(&i2c->mdcntl);
 
-               val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL;
-               if (speed >= 400000)
-                       val |= IIC_MDCNTL_FSM;
-               out_8(&i2c->mdcntl, val);
+       /* Ignore General Call, slave transfers are ignored,
+        * disable interrupts, exit unknown bus state, enable hold
+        * SCL 100kHz normaly or FastMode for 400kHz and above
+        */
 
-               /* clear control reg */
-               out_8(&i2c->cntl, 0x00);
-       }
+       val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL;
+       if (speed >= 400000)
+               val |= IIC_MDCNTL_FSM;
+       out_8(&i2c->mdcntl, val);
 
-       /* set to SPD bus as default bus upon powerup */
-       I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
+       /* clear control reg */
+       out_8(&i2c->cntl, 0x00);
 }
 
 /*
@@ -194,14 +185,15 @@ void i2c_init(int speed, int slaveaddr)
  *
  * It does not check XFRCNT.
  */
-static int i2c_transfer(unsigned char cmd_type,
+static int _i2c_transfer(struct i2c_adapter *adap,
+                       unsigned char cmd_type,
                        unsigned char chip,
                        unsigned char addr[],
                        unsigned char addr_len,
                        unsigned char data[],
                        unsigned short data_len)
 {
-       struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
+       struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
        u8 *ptr;
        int reading;
        int tran, cnt;
@@ -345,7 +337,7 @@ static int i2c_transfer(unsigned char cmd_type,
        return result;
 }
 
-int i2c_probe(uchar chip)
+static int ppc4xx_i2c_probe(struct i2c_adapter *adap, uchar chip)
 {
        uchar buf[1];
 
@@ -356,11 +348,11 @@ int i2c_probe(uchar chip)
         * address was <ACK>ed (i.e. there was a chip at that address which
         * drove the data line low).
         */
-       return (i2c_transfer(1, chip << 1, 0, 0, buf, 1) != 0);
+       return (_i2c_transfer(adap, 1, chip << 1, 0, 0, buf, 1) != 0);
 }
 
-static int ppc4xx_i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
-                              int len, int read)
+static int ppc4xx_i2c_transfer(struct i2c_adapter *adap, uchar chip, uint addr,
+                              int alen, uchar *buffer, int len, int read)
 {
        uchar xaddr[4];
        int ret;
@@ -394,43 +386,50 @@ static int ppc4xx_i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
                chip |= ((addr >> (alen * 8)) &
                         CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
 #endif
-       if ((ret = i2c_transfer(read, chip << 1, &xaddr[4 - alen], alen,
-                               buffer, len)) != 0) {
+       ret = _i2c_transfer(adap, read, chip << 1, &xaddr[4 - alen], alen,
+                           buffer, len);
+       if (ret) {
                printf("I2C %s: failed %d\n", read ? "read" : "write", ret);
-
                return 1;
        }
 
        return 0;
 }
 
-int i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
+static int ppc4xx_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
+                          int alen, uchar *buffer, int len)
 {
-       return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 1);
+       return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 1);
 }
 
-int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
+static int ppc4xx_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
+                           int alen, uchar *buffer, int len)
 {
-       return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 0);
+       return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 0);
 }
 
-#if defined(CONFIG_I2C_MULTI_BUS)
-/*
- * Functions for multiple I2C bus handling
- */
-unsigned int i2c_get_bus_num(void)
+static unsigned int ppc4xx_i2c_set_bus_speed(struct i2c_adapter *adap,
+                                            unsigned int speed)
 {
-       return i2c_bus_num;
-}
-
-int i2c_set_bus_num(unsigned int bus)
-{
-       if (bus >= CONFIG_SYS_MAX_I2C_BUS)
+       if (speed != adap->speed)
                return -1;
-
-       i2c_bus_num = bus;
-
-       return 0;
+       return speed;
 }
-#endif /* CONFIG_I2C_MULTI_BUS */
-#endif /* CONFIG_HARD_I2C */
+
+/*
+ * Register ppc4xx i2c adapters
+ */
+#ifdef CONFIG_SYS_I2C_PPC4XX_CH0
+U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_0, ppc4xx_i2c_init, ppc4xx_i2c_probe,
+                        ppc4xx_i2c_read, ppc4xx_i2c_write,
+                        ppc4xx_i2c_set_bus_speed,
+                        CONFIG_SYS_I2C_PPC4XX_SPEED_0,
+                        CONFIG_SYS_I2C_PPC4XX_SLAVE_0, 0)
+#endif
+#ifdef CONFIG_SYS_I2C_PPC4XX_CH1
+U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_1, ppc4xx_i2c_init, ppc4xx_i2c_probe,
+                        ppc4xx_i2c_read, ppc4xx_i2c_write,
+                        ppc4xx_i2c_set_bus_speed,
+                        CONFIG_SYS_I2C_PPC4XX_SPEED_1,
+                        CONFIG_SYS_I2C_PPC4XX_SLAVE_1, 1)
+#endif
index 1e392290d70623d3727275303fb024aa94296abf..8ba5d6315cf6b0d776f0b72e9f6ffca2562985d6 100644 (file)
 /*
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08 */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address */
index 35c37731cbc669d12f456c7882f8fc2ec6831a3f..6d40748d0e63d1f71ff77aa065e2a33353d7e32c 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index fd3eff0c1f49172a2d4d39bbc64a274d479b8d4c..b805fbd58a540634967b17aa46922ea5d79093cf 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address     */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* bytes of address             */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
+
+#define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08     */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* bytes of address     */
 /* mask of address bits that overflow into the "EEPROM chip address"   */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW    0x07
 
index 7017f8c19b1438f55cd171ace09648563bf127d5..e56b2474aa05466abaf1db5809c5dc2cdf142a62 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 686d15883c7a82edcfe84fc816000272f5884639..ca258e6b29dc5699d6078ffd4f5416dd75e1182a 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index bbd93ac502040b1f95e4daec52249e939c22add0..bac51d10ec302beff7897e122021440a6a7af65c 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 36476e0135b6fe3c5c4ed8020ca9cb7d4fd36017..bb2e92f9fb703d75483e758b97d171b647058006 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 4c12c85c2b2bdb2a026de407dba136aa954099ab..a442e365668f9b5e9e07ece6ff841ccbe5f305b5 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 96b6c0ab669d8320a7237e1225414c4720e3a499..f2422c5925e6e400cc7434cc1ac317785a209d7a 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC32) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC32             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2       /* Bytes of address             */
index c4cc5fd7375f92503aea15c7792bb72aec388295..3f072d34af2eebaa923f73bfda7406c5b288cc80 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 78c66c76a779e38c1a3d2650c38988174a6e55a8..93854188392da6b89a9d80f28546758ca0826e74 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 6bceccbc14b355b009fc276181753e506fcaf298..37139edd660893286d1b05afeadd110e5244ad32 100644 (file)
  #define CONFIG_SERVERIP         10.0.0.1
  #define CONFIG_ETHADDR          00:40:a6:80:14:5
  */
-#define CONFIG_HARD_I2C         1              /* hardware support for i2c */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
 #define CONFIG_SDRAM_BANK0             1
-#define CONFIG_SYS_I2C_SPEED               400000      /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE               0x7F
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0              400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0              0x7F
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x57
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_IDENT_STRING     "Cray L1"
index 6d67d6ee40663bff0f3c0181c4f7b289d115d322..fa09797596a2235baacf276c936c05732165408a 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 24df85a88543c2a0271092ff4c96f7877c688147..26162d1a43643764967451912e383d7b5b32d6ea 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 152821f56766474eb8246e5565b6dacffb839ab8..72f6a3103615fd0113124fc2bda909411b78e546 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
-#define CONFIG_I2C_MULTI_BUS    1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
+#define CONFIG_SYS_I2C_PPC4XX_CH1
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_1          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1          0x7F
 
 #define CONFIG_SYS_SPD_BUS_NUM         0
 #define IIC1_MCP3021_ADDR      0x4d
 #define IIC1_USB2507_ADDR      0x2c
-#ifdef CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_I2C_NOPROBES        {{1, IIC1_USB2507_ADDR}}
-#endif
+#define CONFIG_SYS_I2C_NOPROBES                { {1, IIC1_USB2507_ADDR} }
+
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x54
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
index b6769ae68dc53201832176e695e1c50311478cdf..93be37fe46e55cdf686a60dffe71ea2e44de0022 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT24WC08             */
 /* CAT24WC08/16... */
index d65377f58004aab8e039058a573eee1179bee7cf..7ca4212526cb592536bdde25108b515b8794fcc3 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
 #if 0 /* test-only */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 #else
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
 #endif
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT24WC08             */
 #define CONFIG_SYS_EEPROM_WREN         1
index e90782f56a9cbb0c7f3a8a28cab72f6fe4f315da..ecfc4aa0a77f2f9ab9a7dc23d2aee94fc06ba754 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 76509be0485bce874a5a639cfa0eef4bc388c9b6..271ebdacaf2d66d283afbba5dd1566834f16b39e 100644 (file)
 
 #define CONFIG_SYS_HZ          1000            /* decrementer freq: 1 ms ticks */
 
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 
 /*-----------------------------------------------------------------------
index 5736fcfa10227a3d0cc535a91e2e6753c4fb80cc..43ecf5db498c13d252e4c6a238a0bb2196bc063e 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C              1              /* I2C hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED         400000         /* I2C speed 400kHz        */
-#define CONFIG_SYS_I2C_SLAVE         0x7F           /* I2C slave address       */
-#define CONFIG_SYS_I2C_NOPROBES      {0x69}         /* Don't probe these addrs */
-#define CONFIG_I2C_BUS1              1              /* Include i2c bus 1 supp  */
-
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
+#define CONFIG_SYS_I2C_PPC4XX_CH1
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
+#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
 
 /*-----------------------------------------------------------------------
  * Environment
index 66c4798b5f76499c9b5004461112388e9d7b08bd..074425110cb644d3aab7066f722f07d5782d88d7 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C              1              /* I2C hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED         400000         /* I2C speed 400kHz        */
-#define CONFIG_SYS_I2C_SLAVE         0x7F           /* I2C slave address       */
-#define CONFIG_SYS_I2C_NOPROBES      {0x69}         /* Don't probe these addrs */
-#define CONFIG_I2C_BUS1              1              /* Include i2c bus 1 supp  */
-
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
+#define CONFIG_SYS_I2C_PPC4XX_CH1
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
+#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
 
 /*-----------------------------------------------------------------------
  * Environment
index 0d023ab9fbe29d566d1824f16f7dc81ca7871210..7b4d275b80fa7a84573436daab4aa77969a14c44 100644 (file)
  * The Atmel EEPROM uses 16Bit addressing.
  ***************************************************************/
 
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           50000   /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          50000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x53    /* EEPROM 24C128/256            */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2       /* Bytes of address             */
index 4a934176550fa7b4918ddb8a55713abdfb8d6050..1c1568702f1430477f266e7b21d2794358bfdfd7 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index cd1f4254ad5936ac828e814b8a0b4bb6138fc7e0..eda8af287b04e071b33bfc288b47ee0c66815471 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index c3cacefed8cf7dc7e4829dd68d42dcf9d3822542..54c8bb23b00e5103a52dba152c56833f18e3ba1d 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 3757af07a003a4862d1f3d9f1202377b236d93d8..148fb190cdc8f2af083401094bb4eda2610fbfd2 100644 (file)
  * EEPROM of the SDRAM
  * The Atmel EEPROM uses 16Bit addressing.
  ***************************************************************/
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           50000   /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          50000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x53
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
index 1745eb39fc89c92bce69c6dde3a7be17ecf960f6..74bd97d04264f9d2da62fc093d32e136a3ae6f7a 100644 (file)
 /*
  * I2C EEPROM (24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM 24WC16 */
 #define CONFIG_SYS_EEPROM_WREN         1
index d97acecc441a4777dc0ff9b40fe04a496f7f94f1..19583b66b410de535412b080cb8d1936a1923fd0 100644 (file)
 /*
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT24W16 */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address */
index a4275512816b5aeaf89bf297da46712f4623cfc2..33c39f8918183fe7e96ea3b820ea84cf0346400f 100644 (file)
 /*
  * I2C EEPROM (24W16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM 24W16 */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address */
index 4b531828f589e626685b1f3d13e822e717cbe6d6..867f57866ff998562b14a00bc7491d0ebe234890 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
-
-#define CONFIG_I2C_MULTI_BUS   1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
+#define CONFIG_SYS_I2C_PPC4XX_CH1
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_1          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1          0x7F
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 
index 210bc30ca893580080b38794904f7e171076bdd3..a705f1c4e6dd5eef7632700ef43e451d94076aea 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 8f0c4b624170659cbb192bbc219d39421ed69ee9..98d975fbd26b416496bbeb4a593970e2f64b915b 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT24WC08             */
 #define CONFIG_SYS_EEPROM_WREN         1
index 43d6bb31fd43151b2842b472d4da870da5921789..85722e408d645270ee2a178d45cbd44c7e5abdc3 100644 (file)
 /*
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 710812fc9f3313f9b9dd6a7f655095021b01a447..7c5be4076992ba3dc8d41123378227ea55e1a7ac 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index f88dfe4cde68319f5eef5728fb3a135b4a1e675b..41057d01c15bf717263fb7fa26cfa29eb2c35afe 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (ATMEL 24C04N)
  */
-#define CONFIG_HARD_I2C                1               /* Hardware assisted I2C        */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000          /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50            /* EEPROM ATMEL 24C04N          */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1               /* Bytes of address             */
index 0c78acac80666d7f5fc7f79cc340f2e2c3c5b0ad..2632db25bd627ccdc06f6e1a79cf25ffc3d84ab9 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC16) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2c with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index 8c447ca951a00ac5c47c94adcedeb311c476a88a..52a64bf4e70cb454ca48081fd01f9424544ca467 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000          /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
index 9f32a608c0b775f1ea760d588ee54d807c238f95..13978be1de59775cca21c0eb60f289f8e37b43ba 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
-#define CONFIG_SYS_I2C_NOPROBES        {0x69}  /* Don't probe these addrs      */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
+#define CONFIG_SYS_I2C_NOPROBES        { {0, 0x69} }   /* Don't probe these addrs */
 
 /*-----------------------------------------------------------------------
  * I2C EEPROM (PCF8594C)
index 80e5735e76c98a9601f3daf308b117e1dcac749e..1dc44fc0b0f6566d5af0858d4680f056c5a63aaa 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 /*
  * Ethernet/EMAC/PHY
index d36984df2d64b4cd0d6372a2e6a0242d9cb6c5ca..03fa17bb8f856fc2289d9f1eb11c9b797b02b1d9 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
index 3e691fdcf411f19ba7f274413f25d4d7cd59dc26..934da8134b7d37bfd9fca6a9e58695117c61afe2 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed            */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR             0x54
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
index 35a473a429d363489302fdd7886b2996fd04b2cb..43059a06f9b1e9cebed46190ba1732b066ad6551 100644 (file)
  * I2C stuff
  *-----------------------------------------------------------------------
  */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
-#define CONFIG_SYS_I2C_NOPROBES        { 0x69 }        /* avoid i2c probe hangup (why?) */
+#define CONFIG_SYS_I2C_NOPROBES        { {0, 0x69} }   /* avoid i2c probe hangup (?) */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  6       /* 24C02 requires 5ms delay */
 
 #if defined(CONFIG_CMD_EEPROM)
index 92106d762de550a7ef7ab17dbce5e42d31f2f400..a3c04b65dcb3ccd1bc29bd5a4edab957e767d475 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed                    */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR             (0xa8>>1)
index eec087c0dc3f5ad0f0e980ea3de8a4f4ace2e728..c12c3a21005ed5e27c935d0dc4c84ea6b1ab341e 100644 (file)
  * I2C configuration
  *
  */
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed                    */
-#define CONFIG_SYS_I2C_SLAVE           0x7F    /* I2C slave address            */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F    /* I2C slave address */
 
 /*
  * MII PHY configuration
index f6a456c18f11f06fcb80864e0bfcafd9d74ab62d..663424b1966c8381b5e9cb5a38dcf0a5acf83dbf 100644 (file)
  * I2C configuration
  *
  */
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed                    */
-#define CONFIG_SYS_I2C_SLAVE           0x7F    /* I2C slave address            */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F    /* I2C slave address */
 
 /*
  * MII PHY configuration
index 2cd20279bec65ada52ce6cab55562fdf607f0977..5d6308fb186113e88fc6397d123049490f8a462d 100644 (file)
 /*
  * I2C stuff
  */
-#define CONFIG_SYS_I2C_SPEED           100000
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
 
 /* Temp sensor/hwmon/dtt */
 #define CONFIG_DTT_LM63                1       /* National LM63        */
index c490ff67da411e20dd7ce6d8cacacd9350029507..24c9fa429928f3a506bd371ecf590b3ec233181a 100644 (file)
 /*
  * I2C stuff
  */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address*/
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
 
 /*
  * FLASH organization
index b05ba08afdad9a81a879db3c076480a14bec7440..aabc898464e329a34dc3ff99a4ee97ca7209472f 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
index 7b8bac48ec7149ea124786d1cc86a1daeaaa6f69..db1fd284351bf96a3835488471103e00f8393538 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed+slave address*/
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 /*
  * Default environment variables
index c2da4cec9a6e61810e8abf6b77e8fbdb7a190ac8..ba43355007902006cb64d6c426a4e0a9129d84a3 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C_SPEED   100000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0  100000
 
-#define CONFIG_I2C_MULTI_BUS
 #define CONFIG_SYS_SPD_BUS_NUM 0       /* The I2C bus for SPD          */
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
index ed96b1b3c44da058d386ec83b1b99cfdf94bed62..917d214dd1cfddc16ccf912f3c24ca023f0ddd4e 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR             (0xa8>>1)
index 03661cce2dc0eea2e84bb16dde4a63649dc33a3f..4950ad711d878443bb9f63b6483ca09b4ee06668 100644 (file)
 /*
  * I2C stuff
  */
-#define CONFIG_SYS_I2C_SPEED           100000
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
 
 /* Temp sensor/hwmon/dtt */
 #define CONFIG_DTT_LM63                1       /* National LM63        */
index 887aaefd3952d22246e49319cbb0cdf20e4ba009..bb29bedb2d2a509ee0ce1b575538f2ba0c6ad388 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED   400000  /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0  400000
 
 #define CONFIG_PCA9698         1       /* NXP PCA9698 */
 
index 695aa5c85ab8075aafbd3ba395ddd706b1c44a02..5972711574b708b141acac5122205bf1713f4842 100644 (file)
 /*
  * I2C stuff
  */
-#undef CONFIG_HARD_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SOFT            /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SOFT_SPEED      400000
-#define CONFIG_SYS_I2C_SOFT_SLAVE      0xFE
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 /*
  * Software (bit-bang) I2C driver configuration
index c6f712c93786f00bbd3ecf9dd17745ab4c15f7bc..0bde3929da95f92f02ca888de8559710ac2dcd17 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
 
-#define CONFIG_I2C_MULTI_BUS
 #define CONFIG_SYS_SPD_BUS_NUM         0       /* The I2C bus for SPD          */
 
 #define IIC0_BOOTPROM_ADDR     0x50
index aec4a584efbc7b18b83019c7978f9dc045ff92b6..fc34c24a62a89bca0adf6f9a3b6cea08ac53d9aa 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x52    /* I2C boot EEPROM (24C02BN)    */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
index eea8c98b6add0888b62f8aa611891c98ec075a98..c2e7118b1e504552301a5f725eaf4cfe5b2aeaf9 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
index f0e568af83457dd43c638fbceb49df554a47cf3c..6219df70e406869bed77a91dd716c7a528faa222 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
index 4dcb25a9669bcc5fb5277dd036ee4bcf1524f5d7..7d9378ebbfe75c6a5732b6dff5fa841c4266e693 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_HARD_I2C                                /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000          /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_RTC_ADDR        0x51    /* RTC                          */
 #define CONFIG_SYS_I2C_EEPROM_CPU_ADDR 0x52    /* EEPROM          (CPU Modul)  */
index f71f28bb873a22da2b0d9f23d67e05f758aa9309..66f35d7799f707745439ef97e3a55740ba02f82d 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  6       /* 24C02 requires 5ms delay */
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x52    /* I2C boot EEPROM (24C02BN)    */
index 38b5becc2edaa9ed5dedb696c332a063dea33126..be1c9ff5a6af352c0de31800890fda292955e45f 100644 (file)
 /*
  * I2C stuff
  */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
 
 /* RTC */
 #define CONFIG_RTC_DS1337
index 3e64c7405bfda9c096fd2c96eab9131d9ad4d8ac..0bac61168b6953e0a3ad13b622bffe64d0bb1d9f 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
index 3c33da73bb86e26433716bafa9c0c9905125ec66..9f7642816cefae8674818e86a436d9575c762a8f 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
-#define CONFIG_SYS_I2C_NOPROBES        {0x69}  /* Don't probe these addrs      */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
+#define CONFIG_SYS_I2C_NOPROBES        { {0, 0x69} }   /* Don't probe these addrs */
 
 /*-----------------------------------------------------------------------
  * I2C RTC
index 6358104c1ab828c6ff89fff7ac9868029d0d6c42..1104f92482dc22afa4597295cb2570bb80661134 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C                1           /* I2C with hardware support        */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa4>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
index 30a8c5519f4b9e6ee955d9259a6c6aee6d59e86a..809d76439239b481d8e8d9a22c847c5e1fd9a77a 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C                1               /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000          /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50            /* base address */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2               /* bytes of address */
index f75ab6781826455266bf1bf963ecafcd8d70e0fa..355c330c336a59d2ddd55ace83e327f223845ddd 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed                    */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define IIC0_BOOTPROM_ADDR     0x50
 #define IIC0_ALT_BOOTPROM_ADDR 0x54
 
 /* Don't probe these addrs */
-#define CONFIG_SYS_I2C_NOPROBES        {0x50, 0x52, 0x53, 0x54}
+#define CONFIG_SYS_I2C_NOPROBES        { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} }
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2       /* Bytes of address             */
 
index 4120cf4d2a96e067130af863e58f7c63ccfe1d5a..d5eb74563a340e64ffb3830fc5786c6bbbe5752e 100644 (file)
 
 #define CONFIG_SYS_RX_ETH_BUFFER       16      /* use 16 rx buffer on 405 emac */
 
-#define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 /*-----------------------------------------------------------------------
  * PCI stuff
index 59636f7f77fdf0cba392fd5113472cb00a7b410f..27859ee7db4896f8b40ba670456017f0ccaaf014 100644 (file)
  * IIC stuff
  *-----------------------------------------------------------------------
  */
-#define  CONFIG_HARD_I2C               /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
+#define  CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
 
 #define I2C_INIT
 #define I2C_ACTIVE 0
 #define I2C_TRISTATE 0
 
-#define CONFIG_SYS_I2C_SPEED           100000  /* use the standard 100kHz speed */
-#define CONFIG_SYS_I2C_SLAVE           0x7F            /* mask valid bits */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F    /* mask valid bits */
 
 #define CONFIG_RTC_DS1337
 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
index 11fce53c025977ee060c2d8d35115e4165395f16..e09069530c6cba970ce4c15531856187a236804d 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
index ff2189c2fbc4416a29947a81ffe48ff57e6aac4b..dfd8db4b1c8f218b000fe05ac831507a1b899fae 100644 (file)
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C_SPEED                   400000  /* I2C speed */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0                  400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR             (0xa8>>1)
index a43c3da4a07af826aa13b3feea256582276ef806..d43894c4deeb6f0dba833401bc9d6372dd555c69 100644 (file)
  * I2C stuff
  *-----------------------------------------------------------------------
  */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
-#define CONFIG_SYS_I2C_NOPROBES        { 0x69 } /* avoid i2c probe hangup (why?) */
+#define CONFIG_SYS_I2C_NOPROBES        { {0, 0x69} } /* avoid i2c probe hangup (?) */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  6 /* 24C02 requires 5ms delay */
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* I2C boot EEPROM (24C02W)     */
index c9f1a9fa24446dc55229c7e98a59153b52129a2d..20989a7fdb24120842f607141068d5143693de19 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #undef CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50
index 219f276a4c57e37d2b874b56072f46ed0edc186e..bb81b2b587262760660927c0d019c5342f5a220b 100644 (file)
@@ -95,7 +95,7 @@
  * I2C stuff
  *-----------------------------------------------------------------------
  */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
index 1f48cc57724ef71822bee78103b76627de98037c..dab7d39af7f5745c45d82a1fbce9196178c1584c 100644 (file)
@@ -145,11 +145,11 @@ extern void out32(unsigned int, unsigned long);
 /*
  * I2C
  */
-#define CONFIG_HARD_I2C                        1       /* I2C with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7f
-#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7f
 
 /* I2C EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_ADDR             0x50
index cde0df1a08f9bab9b560e7ab8fe7358db42c818c..e814cfd26230c64b697a97e48e7ebdd6699947ac 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
index 3282d378d7de0a837ecfdb0b486455fd4e15dc01..33a82d9269c87cc32e02113f70826730f029f00d 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define IIC0_BOOTPROM_ADDR     0x50
 #define IIC0_ALT_BOOTPROM_ADDR 0x54
 
 /* Don't probe these addrs */
-#define CONFIG_SYS_I2C_NOPROBES        {0x50, 0x52, 0x53, 0x54}
+#define CONFIG_SYS_I2C_NOPROBES        { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} }
 
 /* #if defined(CONFIG_CMD_EEPROM) */
 /* #define CONFIG_SYS_I2C_EEPROM_ADDR  0x50 */ /* I2C boot EEPROM              */
index 75195bc742cf65a121bf88db7529c3b17290d0a1..b653993700345362ccd85d1532e9aade18d7d3c4 100644 (file)
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C                1               /* I2C with hardware support    */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000          /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
 
 /* these are for the ST M24C02 2kbit serial i2c eeprom */
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50            /* base address */