dm: x86: Add a driver for Intel PCH9
authorSimon Glass <sjg@chromium.org>
Tue, 19 Jan 2016 03:19:19 +0000 (20:19 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Sun, 24 Jan 2016 04:07:17 +0000 (12:07 +0800)
At some point we may need to distinguish between different types of PCHs,
but for existing supported platforms we only need to worry about version 7
and version 9 bridges. Add a driver for the PCH9.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
drivers/pch/Makefile
drivers/pch/pch9.c [new file with mode: 0644]

index 33aa727017188d9cd47a8dd3a7df04a6efc454a0..dde9e86d4e939dd3b2d74dcd0f0195b89926dbf5 100644 (file)
@@ -4,3 +4,4 @@
 
 obj-y += pch-uclass.o
 obj-y += pch7.o
+obj-y += pch9.o
diff --git a/drivers/pch/pch9.c b/drivers/pch/pch9.c
new file mode 100644 (file)
index 0000000..529cb02
--- /dev/null
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pch.h>
+
+#define SBASE_ADDR     0x54
+
+static int pch9_get_sbase(struct udevice *dev, ulong *sbasep)
+{
+       uint32_t sbase_addr;
+
+       dm_pci_read_config32(dev, SBASE_ADDR, &sbase_addr);
+       *sbasep = sbase_addr & 0xfffffe00;
+
+       return 0;
+}
+
+static enum pch_version pch9_get_version(struct udevice *dev)
+{
+       return PCHV_9;
+}
+
+static const struct pch_ops pch9_ops = {
+       .get_sbase      = pch9_get_sbase,
+       .get_version    = pch9_get_version,
+};
+
+static const struct udevice_id pch9_ids[] = {
+       { .compatible = "intel,pch9" },
+       { }
+};
+
+U_BOOT_DRIVER(pch9_drv) = {
+       .name           = "intel-pch9",
+       .id             = UCLASS_PCH,
+       .of_match       = pch9_ids,
+       .ops            = &pch9_ops,
+};