clk: rk3399: Set empty for TCPHY assigned-clocks
authorJagan Teki <jagan@amarulasolutions.com>
Tue, 26 May 2020 03:32:06 +0000 (11:32 +0800)
committerKever Yang <kever.yang@rock-chips.com>
Fri, 29 May 2020 10:08:49 +0000 (18:08 +0800)
Due to v5.7-rc1 sync the SD controller nodes in rk3399.dtsi
have SCLK_UPHY0_TCPDCORE, SCLK_UPHY1_TCPDCORE assigned-clocks
which are usually required for Linux and don't require to
handle them in U-Boot.

  assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
  assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;

So, mark them as empty in clock otherwise device probe on
those typec phy driver would fail.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/clk/rockchip/clk_rk3399.c

index 773d2176e674a72374c6a82a40913defda1ccf26..ce163aec5a131f764d88454e633c982a84bc8c5c 100644 (file)
@@ -1000,6 +1000,8 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
        case ACLK_VOP1:
        case HCLK_VOP1:
        case HCLK_SD:
+       case SCLK_UPHY0_TCPDCORE:
+       case SCLK_UPHY1_TCPDCORE:
                /**
                 * assigned-clocks handling won't require for vopl, so
                 * return 0 to satisfy clk_set_defaults during device probe.