i2c: powerpc: Remove use of CONFIG_HARD_I2C
authorSimon Glass <sjg@chromium.org>
Sat, 13 May 2017 03:09:50 +0000 (21:09 -0600)
committerHeiko Schocher <hs@denx.de>
Mon, 15 May 2017 04:17:25 +0000 (06:17 +0200)
Drop use of this long-deprecated option for powerpc.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 files changed:
arch/powerpc/cpu/mpc512x/Makefile
arch/powerpc/cpu/mpc512x/i2c.c [deleted file]
arch/powerpc/cpu/mpc5xxx/Makefile
arch/powerpc/cpu/mpc5xxx/i2c.c [deleted file]
arch/powerpc/cpu/mpc8260/Makefile
arch/powerpc/cpu/mpc8260/commproc.c
arch/powerpc/cpu/mpc8260/i2c.c [deleted file]
arch/powerpc/cpu/mpc8xx/Makefile
arch/powerpc/cpu/mpc8xx/i2c.c [deleted file]
board/freescale/m52277evb/README
board/freescale/m53017evb/README
board/freescale/m5373evb/README
board/freescale/m54455evb/README
board/freescale/m547xevb/README

index 98991c688befb7fa7912dcd59769cae701f23374..933deebdaeab8182ccd239c515f105e6412def05 100644 (file)
@@ -9,7 +9,6 @@ obj-y   := cpu.o
 obj-y  += traps.o
 obj-y += cpu_init.o
 obj-y += fixed_sdram.o
-obj-y += i2c.o
 obj-y += interrupts.o
 obj-y += iopin.o
 obj-y += serial.o
diff --git a/arch/powerpc/cpu/mpc512x/i2c.c b/arch/powerpc/cpu/mpc512x/i2c.c
deleted file mode 100644 (file)
index 15d519a..0000000
+++ /dev/null
@@ -1,386 +0,0 @@
-/*
- * (C) Copyright 2003 - 2009
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- *
- * Based on the MPC5xxx code.
- */
-
-#include <common.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_HARD_I2C
-
-#include <i2c.h>
-
-/* by default set I2C bus 0 active */
-static unsigned int bus_num __attribute__ ((section (".data"))) = 0;
-
-#define I2C_TIMEOUT    100
-#define I2C_RETRIES    3
-
-struct mpc512x_i2c_tap {
-       int scl2tap;
-       int tap2tap;
-};
-
-static int  mpc_reg_in(volatile u32 *reg);
-static void mpc_reg_out(volatile u32 *reg, int val, int mask);
-static int  wait_for_bb(void);
-static int  wait_for_pin(int *status);
-static int  do_address(uchar chip, char rdwr_flag);
-static int  send_bytes(uchar chip, char *buf, int len);
-static int  receive_bytes(uchar chip, char *buf, int len);
-static int  mpc_get_fdr(int);
-
-static int mpc_reg_in (volatile u32 *reg)
-{
-       int ret = in_be32(reg) >> 24;
-
-       return ret;
-}
-
-static void mpc_reg_out (volatile u32 *reg, int val, int mask)
-{
-       if (!mask) {
-               out_be32(reg, val << 24);
-       } else {
-               clrsetbits_be32(reg, mask << 24, (val & mask) << 24);
-       }
-}
-
-static int wait_for_bb (void)
-{
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
-       int timeout = I2C_TIMEOUT;
-       int status;
-
-       status = mpc_reg_in (&regs->msr);
-
-       while (timeout-- && (status & I2C_BB)) {
-               mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
-               (void)mpc_reg_in(&regs->mdr);
-               mpc_reg_out (&regs->mcr, 0, I2C_STA);
-               mpc_reg_out (&regs->mcr, 0, 0);
-               mpc_reg_out (&regs->mcr, I2C_EN, 0);
-
-               udelay (1000);
-               status = mpc_reg_in (&regs->msr);
-       }
-
-       return (status & I2C_BB);
-}
-
-static int wait_for_pin (int *status)
-{
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
-       int timeout = I2C_TIMEOUT;
-
-       *status = mpc_reg_in (&regs->msr);
-
-       while (timeout-- && !(*status & I2C_IF)) {
-               udelay (1000);
-               *status = mpc_reg_in (&regs->msr);
-       }
-
-       if (!(*status & I2C_IF)) {
-               return -1;
-       }
-
-       mpc_reg_out (&regs->msr, 0, I2C_IF);
-
-       return 0;
-}
-
-static int do_address (uchar chip, char rdwr_flag)
-{
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
-       int status;
-
-       chip <<= 1;
-
-       if (rdwr_flag) {
-               chip |= 1;
-       }
-
-       mpc_reg_out (&regs->mcr, I2C_TX, I2C_TX);
-       mpc_reg_out (&regs->mdr, chip, 0);
-
-       if (wait_for_pin (&status)) {
-               return -2;
-       }
-
-       if (status & I2C_RXAK) {
-               return -3;
-       }
-
-       return 0;
-}
-
-static int send_bytes (uchar chip, char *buf, int len)
-{
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
-       int wrcount;
-       int status;
-
-       for (wrcount = 0; wrcount < len; ++wrcount) {
-
-               mpc_reg_out (&regs->mdr, buf[wrcount], 0);
-
-               if (wait_for_pin (&status)) {
-                       break;
-               }
-
-               if (status & I2C_RXAK) {
-                       break;
-               }
-
-       }
-
-       return !(wrcount == len);
-}
-
-static int receive_bytes (uchar chip, char *buf, int len)
-{
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
-       int dummy   = 1;
-       int rdcount = 0;
-       int status;
-       int i;
-
-       mpc_reg_out (&regs->mcr, 0, I2C_TX);
-
-       for (i = 0; i < len; ++i) {
-               buf[rdcount] = mpc_reg_in (&regs->mdr);
-
-               if (dummy) {
-                       dummy = 0;
-               } else {
-                       rdcount++;
-               }
-
-               if (wait_for_pin (&status)) {
-                       return -4;
-               }
-       }
-
-       mpc_reg_out (&regs->mcr, I2C_TXAK, I2C_TXAK);
-       buf[rdcount++] = mpc_reg_in (&regs->mdr);
-
-       if (wait_for_pin (&status)) {
-               return -5;
-       }
-
-       mpc_reg_out (&regs->mcr, 0, I2C_TXAK);
-
-       return 0;
-}
-
-/**************** I2C API ****************/
-
-void i2c_init (int speed, int saddr)
-{
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       int i;
-
-       for (i = 0; i < I2C_BUS_CNT; i++){
-               volatile i2c512x_dev_t *regs = &im->i2c.dev[i];
-
-               mpc_reg_out (&regs->mcr, 0, 0);
-
-               /* Set clock */
-               mpc_reg_out (&regs->mfdr, mpc_get_fdr (speed), 0);
-               mpc_reg_out (&regs->madr, saddr << 1, 0);
-
-               /* Enable module */
-               mpc_reg_out (&regs->mcr, I2C_EN, I2C_INIT_MASK);
-               mpc_reg_out (&regs->msr, 0, I2C_IF);
-       }
-
-       /* Disable interrupts */
-       out_be32(&im->i2c.icr, 0);
-
-       /* Turn off filters */
-       out_be32(&im->i2c.mifr, 0);
-}
-
-static int mpc_get_fdr (int speed)
-{
-       static int fdr = -1;
-
-       if (fdr == -1) {
-               ulong best_speed = 0;
-               ulong divider;
-               ulong ips, scl;
-               ulong bestmatch = 0xffffffffUL;
-               int best_i = 0, best_j = 0, i, j;
-               int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
-               struct mpc512x_i2c_tap scltap[] = {
-                       {4, 1},
-                       {4, 2},
-                       {6, 4},
-                       {6, 8},
-                       {14, 16},
-                       {30, 32},
-                       {62, 64},
-                       {126, 128}
-               };
-
-               ips = gd->arch.ips_clk;
-               for (i = 7; i >= 0; i--) {
-                       for (j = 7; j >= 0; j--) {
-                               scl = 2 * (scltap[j].scl2tap +
-                                          (SCL_Tap[i] - 1) * scltap[j].tap2tap
-                                          + 2);
-                               if (ips <= speed*scl) {
-                                       if ((speed*scl - ips) < bestmatch) {
-                                               bestmatch = speed*scl - ips;
-                                               best_i = i;
-                                               best_j = j;
-                                               best_speed = ips/scl;
-                                       }
-                               }
-                       }
-               }
-               divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
-               if (gd->flags & GD_FLG_RELOC) {
-                       fdr = divider;
-               } else {
-                       debug("%ld kHz, \n", best_speed / 1000);
-                       return divider;
-               }
-       }
-
-       return fdr;
-}
-
-int i2c_probe (uchar chip)
-{
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
-       int i;
-
-       for (i = 0; i < I2C_RETRIES; i++) {
-               mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
-
-               if (! do_address (chip, 0)) {
-                       mpc_reg_out (&regs->mcr, 0, I2C_STA);
-                       udelay (500);
-                       break;
-               }
-
-               mpc_reg_out (&regs->mcr, 0, I2C_STA);
-               udelay (500);
-       }
-
-       return (i == I2C_RETRIES);
-}
-
-int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)
-{
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
-       char xaddr[4];
-       int ret = -1;
-
-       xaddr[0] = (addr >> 24) & 0xFF;
-       xaddr[1] = (addr >> 16) & 0xFF;
-       xaddr[2] = (addr >>  8) & 0xFF;
-       xaddr[3] =  addr        & 0xFF;
-
-       if (wait_for_bb ()) {
-               printf ("i2c_read: bus is busy\n");
-               goto Done;
-       }
-
-       mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
-       if (do_address (chip, 0)) {
-               printf ("i2c_read: failed to address chip\n");
-               goto Done;
-       }
-
-       if (send_bytes (chip, &xaddr[4-alen], alen)) {
-               printf ("i2c_read: send_bytes failed\n");
-               goto Done;
-       }
-
-       mpc_reg_out (&regs->mcr, I2C_RSTA, I2C_RSTA);
-       if (do_address (chip, 1)) {
-               printf ("i2c_read: failed to address chip\n");
-               goto Done;
-       }
-
-       if (receive_bytes (chip, (char *)buf, len)) {
-               printf ("i2c_read: receive_bytes failed\n");
-               goto Done;
-       }
-
-       ret = 0;
-Done:
-       mpc_reg_out (&regs->mcr, 0, I2C_STA);
-       return ret;
-}
-
-int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)
-{
-       volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
-       char xaddr[4];
-       int ret = -1;
-
-       xaddr[0] = (addr >> 24) & 0xFF;
-       xaddr[1] = (addr >> 16) & 0xFF;
-       xaddr[2] = (addr >>  8) & 0xFF;
-       xaddr[3] =  addr        & 0xFF;
-
-       if (wait_for_bb ()) {
-               printf ("i2c_write: bus is busy\n");
-               goto Done;
-       }
-
-       mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
-       if (do_address (chip, 0)) {
-               printf ("i2c_write: failed to address chip\n");
-               goto Done;
-       }
-
-       if (send_bytes (chip, &xaddr[4-alen], alen)) {
-               printf ("i2c_write: send_bytes failed\n");
-               goto Done;
-       }
-
-       if (send_bytes (chip, (char *)buf, len)) {
-               printf ("i2c_write: send_bytes failed\n");
-               goto Done;
-       }
-
-       ret = 0;
-Done:
-       mpc_reg_out (&regs->mcr, 0, I2C_STA);
-       return ret;
-}
-
-int i2c_set_bus_num (unsigned int bus)
-{
-       if (bus >= I2C_BUS_CNT) {
-               return -1;
-       }
-       bus_num = bus;
-
-       return 0;
-}
-
-unsigned int i2c_get_bus_num (void)
-{
-       return bus_num;
-}
-
-#endif /* CONFIG_HARD_I2C */
index 5c67e1d37d8ca858a1ac963e9ca0ca9dc1d72cd0..88e3b2e3aefe29c199ac5f8acd38415f171b425e 100644 (file)
@@ -9,7 +9,6 @@ extra-y = start.o
 extra-y += traps.o
 obj-y  += io.o
 obj-y  += firmware_sc_task_bestcomm.impl.o
-obj-y += i2c.o
 obj-y += cpu.o
 obj-y += cpu_init.o
 obj-y += ide.o
diff --git a/arch/powerpc/cpu/mpc5xxx/i2c.c b/arch/powerpc/cpu/mpc5xxx/i2c.c
deleted file mode 100644 (file)
index 73601ae..0000000
+++ /dev/null
@@ -1,456 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_HARD_I2C
-
-#include <mpc5xxx.h>
-#include <i2c.h>
-
-#if !defined(CONFIG_I2C_MULTI_BUS)
-#if (CONFIG_SYS_I2C_MODULE == 2)
-#define I2C_BASE       MPC5XXX_I2C2
-#elif (CONFIG_SYS_I2C_MODULE == 1)
-#define I2C_BASE       MPC5XXX_I2C1
-#else
-#error CONFIG_SYS_I2C_MODULE is not properly configured
-#endif
-#else
-static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
-                                               CONFIG_SYS_SPD_BUS_NUM;
-static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED,
-                                       CONFIG_SYS_I2C_SPEED};
-
-static const  unsigned long i2c_dev[2] = {
-       MPC5XXX_I2C1,
-       MPC5XXX_I2C2,
-};
-
-#define I2C_BASE       ((struct mpc5xxx_i2c *)i2c_dev[i2c_bus_num])
-#endif
-
-#define I2C_TIMEOUT    6667
-#define I2C_RETRIES    3
-
-struct mpc5xxx_i2c_tap {
-       int scl2tap;
-       int tap2tap;
-};
-
-static int  mpc_reg_in    (volatile u32 *reg);
-static void mpc_reg_out   (volatile u32 *reg, int val, int mask);
-static int  wait_for_bb   (void);
-static int  wait_for_pin  (int *status);
-static int  do_address    (uchar chip, char rdwr_flag);
-static int  send_bytes    (uchar chip, char *buf, int len);
-static int  receive_bytes (uchar chip, char *buf, int len);
-static int  mpc_get_fdr   (int);
-
-static int mpc_reg_in(volatile u32 *reg)
-{
-       int ret = *reg >> 24;
-       __asm__ __volatile__ ("eieio");
-       return ret;
-}
-
-static void mpc_reg_out(volatile u32 *reg, int val, int mask)
-{
-       int tmp;
-
-       if (!mask) {
-               *reg = val << 24;
-       } else {
-               tmp = mpc_reg_in(reg);
-               *reg = ((tmp & ~mask) | (val & mask)) << 24;
-       }
-       __asm__ __volatile__ ("eieio");
-
-       return;
-}
-
-static int wait_for_bb(void)
-{
-       struct mpc5xxx_i2c *regs    = (struct mpc5xxx_i2c *)I2C_BASE;
-       int                 timeout = I2C_TIMEOUT;
-       int                 status;
-
-       status = mpc_reg_in(&regs->msr);
-
-       while (timeout-- && (status & I2C_BB)) {
-               mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
-               (void)mpc_reg_in(&regs->mdr);
-               mpc_reg_out(&regs->mcr, 0, I2C_STA);
-               mpc_reg_out(&regs->mcr, 0, 0);
-               mpc_reg_out(&regs->mcr, I2C_EN, 0);
-               udelay(15);
-               status = mpc_reg_in(&regs->msr);
-       }
-
-       return (status & I2C_BB);
-}
-
-static int wait_for_pin(int *status)
-{
-       struct mpc5xxx_i2c *regs    = (struct mpc5xxx_i2c *)I2C_BASE;
-       int                 timeout = I2C_TIMEOUT;
-
-       *status = mpc_reg_in(&regs->msr);
-
-       while (timeout-- && !(*status & I2C_IF)) {
-               udelay(15);
-               *status = mpc_reg_in(&regs->msr);
-       }
-
-       if (!(*status & I2C_IF)) {
-               return -1;
-       }
-
-       mpc_reg_out(&regs->msr, 0, I2C_IF);
-
-       return 0;
-}
-
-static int do_address(uchar chip, char rdwr_flag)
-{
-       struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
-       int                 status;
-
-       chip <<= 1;
-
-       if (rdwr_flag) {
-               chip |= 1;
-       }
-
-       mpc_reg_out(&regs->mcr, I2C_TX, I2C_TX);
-       mpc_reg_out(&regs->mdr, chip, 0);
-
-       if (wait_for_pin(&status)) {
-               return -2;
-       }
-
-       if (status & I2C_RXAK) {
-               return -3;
-       }
-
-       return 0;
-}
-
-static int send_bytes(uchar chip, char *buf, int len)
-{
-       struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
-       int                 wrcount;
-       int                 status;
-
-       for (wrcount = 0; wrcount < len; ++wrcount) {
-
-               mpc_reg_out(&regs->mdr, buf[wrcount], 0);
-
-               if (wait_for_pin(&status)) {
-                       break;
-               }
-
-               if (status & I2C_RXAK) {
-                       break;
-               }
-
-       }
-
-       return !(wrcount == len);
-}
-
-static int receive_bytes(uchar chip, char *buf, int len)
-{
-       struct mpc5xxx_i2c *regs    = (struct mpc5xxx_i2c *)I2C_BASE;
-       int                 dummy   = 1;
-       int                 rdcount = 0;
-       int                 status;
-       int                 i;
-
-       mpc_reg_out(&regs->mcr, 0, I2C_TX);
-
-       for (i = 0; i < len; ++i) {
-               buf[rdcount] = mpc_reg_in(&regs->mdr);
-
-               if (dummy) {
-                       dummy = 0;
-               } else {
-                       rdcount++;
-               }
-
-
-               if (wait_for_pin(&status)) {
-                       return -4;
-               }
-       }
-
-       mpc_reg_out(&regs->mcr, I2C_TXAK, I2C_TXAK);
-       buf[rdcount++] = mpc_reg_in(&regs->mdr);
-
-       if (wait_for_pin(&status)) {
-               return -5;
-       }
-
-       mpc_reg_out(&regs->mcr, 0, I2C_TXAK);
-
-       return 0;
-}
-
-#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
-
-#define FDR510(x) (u8) (((x & 0x20) >> 3) | (x & 0x3))
-#define FDR432(x) (u8) ((x & 0x1C) >> 2)
-/*
- * Reset any i2c devices that may have been interrupted during a system reset.
- * Normally this would be accomplished by clocking the line until SCL and SDA
- * are released and then sending a start condtiion (From an Atmel datasheet).
- * There is no direct access to the i2c pins so instead create start commands
- * through the i2c interface.  Send a start command then delay for the SDA Hold
- * time, repeat this by disabling/enabling the bus a total of 9 times.
- */
-static void send_reset(void)
-{
-       struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
-       int i;
-       u32 delay;
-       u8 fdr;
-       int SDA_Tap[] = { 3, 3, 4, 4, 1, 1, 2, 2};
-       struct mpc5xxx_i2c_tap scltap[] = {
-               {4, 1},
-               {4, 2},
-               {6, 4},
-               {6, 8},
-               {14, 16},
-               {30, 32},
-               {62, 64},
-               {126, 128}
-       };
-
-       fdr = (u8)mpc_reg_in(&regs->mfdr);
-
-       delay = scltap[FDR432(fdr)].scl2tap + ((SDA_Tap[FDR510(fdr)] - 1) * \
-               scltap[FDR432(fdr)].tap2tap) + 3;
-
-       for (i = 0; i < 9; i++) {
-               mpc_reg_out(&regs->mcr, I2C_EN|I2C_STA|I2C_TX, I2C_INIT_MASK);
-               udelay(delay);
-               mpc_reg_out(&regs->mcr, 0, I2C_INIT_MASK);
-               udelay(delay);
-       }
-
-       mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
-}
-#endif /* CONFIG_SYS_I2c_INIT_MPC5XXX */
-
-/**************** I2C API ****************/
-
-void i2c_init(int speed, int saddr)
-{
-       struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
-
-       mpc_reg_out(&regs->mcr, 0, 0);
-       mpc_reg_out(&regs->madr, saddr << 1, 0);
-
-       /* Set clock
-        */
-       mpc_reg_out(&regs->mfdr, mpc_get_fdr(speed), 0);
-
-       /* Enable module
-        */
-       mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
-       mpc_reg_out(&regs->msr, 0, I2C_IF);
-
-#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
-       send_reset();
-#endif
-       return;
-}
-
-static int mpc_get_fdr(int speed)
-{
-       static int fdr = -1;
-
-       if (fdr == -1) {
-               ulong best_speed = 0;
-               ulong divider;
-               ulong ipb, scl;
-               ulong bestmatch = 0xffffffffUL;
-               int best_i = 0, best_j = 0, i, j;
-               int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
-               struct mpc5xxx_i2c_tap scltap[] = {
-                       {4, 1},
-                       {4, 2},
-                       {6, 4},
-                       {6, 8},
-                       {14, 16},
-                       {30, 32},
-                       {62, 64},
-                       {126, 128}
-               };
-
-               ipb = gd->arch.ipb_clk;
-               for (i = 7; i >= 0; i--) {
-                       for (j = 7; j >= 0; j--) {
-                               scl = 2 * (scltap[j].scl2tap +
-                                       (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
-                               if (ipb <= speed*scl) {
-                                       if ((speed*scl - ipb) < bestmatch) {
-                                               bestmatch = speed*scl - ipb;
-                                               best_i = i;
-                                               best_j = j;
-                                               best_speed = ipb/scl;
-                                       }
-                               }
-                       }
-               }
-               divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
-               if (gd->flags & GD_FLG_RELOC) {
-                       fdr = divider;
-               } else {
-                       printf("%ld kHz, ", best_speed / 1000);
-                       return divider;
-               }
-       }
-
-       return fdr;
-}
-
-int i2c_probe(uchar chip)
-{
-       struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
-       int                 i;
-
-       for (i = 0; i < I2C_RETRIES; i++) {
-               mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
-
-               if (! do_address(chip, 0)) {
-                       mpc_reg_out(&regs->mcr, 0, I2C_STA);
-                       udelay(500);
-                       break;
-               }
-
-               mpc_reg_out(&regs->mcr, 0, I2C_STA);
-               udelay(500);
-       }
-
-       return (i == I2C_RETRIES);
-}
-
-int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
-{
-       char                xaddr[4];
-       struct mpc5xxx_i2c * regs        = (struct mpc5xxx_i2c *)I2C_BASE;
-       int                  ret         = -1;
-
-       xaddr[0] = (addr >> 24) & 0xFF;
-       xaddr[1] = (addr >> 16) & 0xFF;
-       xaddr[2] = (addr >>  8) & 0xFF;
-       xaddr[3] =  addr        & 0xFF;
-
-       if (wait_for_bb()) {
-               printf("i2c_read: bus is busy\n");
-               goto Done;
-       }
-
-       mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
-       if (do_address(chip, 0)) {
-               printf("i2c_read: failed to address chip\n");
-               goto Done;
-       }
-
-       if (send_bytes(chip, &xaddr[4-alen], alen)) {
-               printf("i2c_read: send_bytes failed\n");
-               goto Done;
-       }
-
-       mpc_reg_out(&regs->mcr, I2C_RSTA, I2C_RSTA);
-       if (do_address(chip, 1)) {
-               printf("i2c_read: failed to address chip\n");
-               goto Done;
-       }
-
-       if (receive_bytes(chip, (char *)buf, len)) {
-               printf("i2c_read: receive_bytes failed\n");
-               goto Done;
-       }
-
-       ret = 0;
-Done:
-       mpc_reg_out(&regs->mcr, 0, I2C_STA);
-       return ret;
-}
-
-int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
-{
-       char               xaddr[4];
-       struct mpc5xxx_i2c *regs        = (struct mpc5xxx_i2c *)I2C_BASE;
-       int                 ret         = -1;
-
-       xaddr[0] = (addr >> 24) & 0xFF;
-       xaddr[1] = (addr >> 16) & 0xFF;
-       xaddr[2] = (addr >>  8) & 0xFF;
-       xaddr[3] =  addr        & 0xFF;
-
-       if (wait_for_bb()) {
-               printf("i2c_write: bus is busy\n");
-               goto Done;
-       }
-
-       mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
-       if (do_address(chip, 0)) {
-               printf("i2c_write: failed to address chip\n");
-               goto Done;
-       }
-
-       if (send_bytes(chip, &xaddr[4-alen], alen)) {
-               printf("i2c_write: send_bytes failed\n");
-               goto Done;
-       }
-
-       if (send_bytes(chip, (char *)buf, len)) {
-               printf("i2c_write: send_bytes failed\n");
-               goto Done;
-       }
-
-       ret = 0;
-Done:
-       mpc_reg_out(&regs->mcr, 0, I2C_STA);
-       return ret;
-}
-
-#if defined(CONFIG_I2C_MULTI_BUS)
-int i2c_set_bus_num(unsigned int bus)
-{
-       if (bus > 1)
-               return -1;
-
-       i2c_bus_num = bus;
-       i2c_init(i2c_bus_speed[bus], CONFIG_SYS_I2C_SLAVE);
-       return 0;
-}
-
-int i2c_set_bus_speed(unsigned int speed)
-{
-       i2c_init(speed, CONFIG_SYS_I2C_SLAVE);
-       return 0;
-}
-
-unsigned int i2c_get_bus_num(void)
-{
-       return i2c_bus_num;
-}
-
-unsigned int i2c_get_bus_speed(void)
-{
-       return i2c_bus_speed[i2c_bus_num];
-}
-#endif
-
-
-#endif /* CONFIG_HARD_I2C */
index 83adc4c4360ff742b3b180be75ed81c9ed2128e3..72dd8aba25afce0bccda278075e918c1c39b3076 100644 (file)
@@ -7,7 +7,7 @@
 
 extra-y        = start.o
 obj-y  = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \
-         interrupts.o ether_fcc.o i2c.o commproc.o \
+         interrupts.o ether_fcc.o commproc.o \
          bedbug_603e.o pci.o spi.o kgdb.o
 
 obj-$(CONFIG_ETHER_ON_SCC) += ether_scc.o
index 484bd177451c3a36b1ba5c7c30152fe3c8275b0f..ff6988108990bf03aba4e4e02d38416acdac2296 100644 (file)
@@ -41,10 +41,6 @@ m8260_cpm_reset(void)
        do {                    /* Spin until command processed         */
                __asm__ __volatile__ ("eieio");
        } while ((immr->im_cpm.cp_cpcr & CPM_CR_FLG) && ++count < 1000000);
-
-#ifdef CONFIG_HARD_I2C
-       immr->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)] = 0;
-#endif
 }
 
 /* Allocate some memory from the dual ported ram.
diff --git a/arch/powerpc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c
deleted file mode 100644 (file)
index a0de101..0000000
+++ /dev/null
@@ -1,741 +0,0 @@
-/*
- * (C) Copyright 2000
- * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
- *
- * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <console.h>
-
-#if defined(CONFIG_HARD_I2C)
-
-#include <asm/cpm_8260.h>
-#include <i2c.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_I2C_MULTI_BUS)
-static unsigned int i2c_bus_num __attribute__ ((section(".data"))) = 0;
-#endif /* CONFIG_I2C_MULTI_BUS */
-
-/* uSec to wait between polls of the i2c */
-#define DELAY_US       100
-/* uSec to wait for the CPM to start processing the buffer */
-#define START_DELAY_US 1000
-
-/*
- * tx/rx per-byte timeout: we delay DELAY_US uSec between polls so the
- * timeout will be (tx_length + rx_length) * DELAY_US * TOUT_LOOP
- */
-#define TOUT_LOOP 5
-
-/*
- * Set default values
- */
-#ifndef        CONFIG_SYS_I2C_SPEED
-#define        CONFIG_SYS_I2C_SPEED    50000
-#endif
-
-
-typedef void (*i2c_ecb_t) (int, int, void *);  /* error callback function */
-
-/* This structure keeps track of the bd and buffer space usage. */
-typedef struct i2c_state {
-       int rx_idx;             /* index   to next free Rx BD */
-       int tx_idx;             /* index   to next free Tx BD */
-       void *rxbd;             /* pointer to next free Rx BD */
-       void *txbd;             /* pointer to next free Tx BD */
-       int tx_space;           /* number  of Tx bytes left   */
-       unsigned char *tx_buf;  /* pointer to free Tx area    */
-       i2c_ecb_t err_cb;       /* error callback function    */
-       void *cb_data;          /* private data to be passed  */
-} i2c_state_t;
-
-/* flags for i2c_send() and i2c_receive() */
-#define        I2CF_ENABLE_SECONDARY   0x01    /* secondary_address is valid   */
-#define        I2CF_START_COND         0x02    /* tx: generate start condition */
-#define I2CF_STOP_COND         0x04    /* tx: generate stop  condition */
-
-/* return codes */
-#define I2CERR_NO_BUFFERS      1       /* no more BDs or buffer space  */
-#define I2CERR_MSG_TOO_LONG    2       /* tried to send/receive to much data */
-#define I2CERR_TIMEOUT         3       /* timeout in i2c_doio()        */
-#define I2CERR_QUEUE_EMPTY     4       /* i2c_doio called without send/rcv */
-#define I2CERR_IO_ERROR                5       /* had an error during comms    */
-
-/* error callback flags */
-#define I2CECB_RX_ERR          0x10    /* this is a receive error      */
-#define     I2CECB_RX_OV       0x02    /* receive overrun error        */
-#define     I2CECB_RX_MASK     0x0f    /* mask for error bits          */
-#define I2CECB_TX_ERR          0x20    /* this is a transmit error     */
-#define     I2CECB_TX_CL       0x01    /* transmit collision error     */
-#define     I2CECB_TX_UN       0x02    /* transmit underflow error     */
-#define     I2CECB_TX_NAK      0x04    /* transmit no ack error        */
-#define     I2CECB_TX_MASK     0x0f    /* mask for error bits          */
-#define I2CECB_TIMEOUT         0x40    /* this is a timeout error      */
-
-#define ERROR_I2C_NONE         0
-#define ERROR_I2C_LENGTH       1
-
-#define I2C_WRITE_BIT          0x00
-#define I2C_READ_BIT           0x01
-
-#define I2C_RXTX_LEN   128     /* maximum tx/rx buffer length */
-
-
-#define NUM_RX_BDS 4
-#define NUM_TX_BDS 4
-#define MAX_TX_SPACE 256
-
-typedef struct I2C_BD {
-       unsigned short status;
-       unsigned short length;
-       unsigned char *addr;
-} I2C_BD;
-
-#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */
-
-#define BD_I2C_TX_CL   0x0001  /* collision error */
-#define BD_I2C_TX_UN   0x0002  /* underflow error */
-#define BD_I2C_TX_NAK  0x0004  /* no acknowledge error */
-#define BD_I2C_TX_ERR  (BD_I2C_TX_NAK|BD_I2C_TX_UN|BD_I2C_TX_CL)
-
-#define BD_I2C_RX_ERR  BD_SC_OV
-
-/*
- * Returns the best value of I2BRG to meet desired clock speed of I2C with
- * input parameters (clock speed, filter, and predivider value).
- * It returns computer speed value and the difference between it and desired
- * speed.
- */
-static inline int
-i2c_roundrate(int hz, int speed, int filter, int modval,
-             int *brgval, int *totspeed)
-{
-       int moddiv = 1 << (5 - (modval & 3)), brgdiv, div;
-
-       debug("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n",
-               hz, speed, filter, modval);
-
-       div = moddiv * speed;
-       brgdiv = (hz + div - 1) / div;
-
-       debug("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv);
-
-       *brgval = ((brgdiv + 1) / 2) - 3 - (2 * filter);
-
-       if ((*brgval < 0) || (*brgval > 255)) {
-               debug("\t\trejected brgval=%d\n", *brgval);
-               return -1;
-       }
-
-       brgdiv = 2 * (*brgval + 3 + (2 * filter));
-       div = moddiv * brgdiv;
-       *totspeed = hz / div;
-
-       debug("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed);
-
-       return 0;
-}
-
-/*
- * Sets the I2C clock predivider and divider to meet required clock speed.
- */
-static int i2c_setrate(int hz, int speed)
-{
-       immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-       volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
-       int     brgval,
-               modval, /* 0-3 */
-               bestspeed_diff = speed,
-               bestspeed_brgval = 0,
-               bestspeed_modval = 0,
-               bestspeed_filter = 0,
-               totspeed,
-               filter = 0;     /* Use this fixed value */
-
-       for (modval = 0; modval < 4; modval++) {
-               if (i2c_roundrate(hz, speed, filter, modval, &brgval, &totspeed)
-                   == 0) {
-                       int diff = speed - totspeed;
-
-                       if ((diff >= 0) && (diff < bestspeed_diff)) {
-                               bestspeed_diff = diff;
-                               bestspeed_modval = modval;
-                               bestspeed_brgval = brgval;
-                               bestspeed_filter = filter;
-                       }
-               }
-       }
-
-       debug("[I2C] Best is:\n");
-       debug("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n",
-               hz, speed, bestspeed_filter, bestspeed_modval, bestspeed_brgval,
-               bestspeed_diff);
-
-       i2c->i2c_i2mod |= ((bestspeed_modval & 3) << 1) |
-               (bestspeed_filter << 3);
-       i2c->i2c_i2brg = bestspeed_brgval & 0xff;
-
-       debug("[I2C] i2mod=%08x i2brg=%08x\n", i2c->i2c_i2mod,
-               i2c->i2c_i2brg);
-
-       return 1;
-}
-
-void i2c_init(int speed, int slaveadd)
-{
-       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-       volatile cpm8260_t *cp = (cpm8260_t *)&immap->im_cpm;
-       volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
-       volatile iic_t *iip;
-       ulong rbase, tbase;
-       volatile I2C_BD *rxbd, *txbd;
-       uint dpaddr;
-
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-       /*
-        * call board specific i2c bus reset routine before accessing the
-        * environment, which might be in a chip on that bus. For details
-        * about this problem see doc/I2C_Edge_Conditions.
-        */
-       i2c_init_board();
-#endif
-
-       dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)];
-       if (dpaddr == 0) {
-               /* need to allocate dual port ram */
-               dpaddr = m8260_cpm_dpalloc(64 +
-                                       (NUM_RX_BDS * sizeof(I2C_BD)) +
-                                       (NUM_TX_BDS * sizeof(I2C_BD)) +
-                                       MAX_TX_SPACE, 64);
-               immap->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)] =
-                       dpaddr;
-       }
-
-       /*
-        * initialise data in dual port ram:
-        *
-        *        dpaddr -> parameter ram (64 bytes)
-        *         rbase -> rx BD         (NUM_RX_BDS * sizeof(I2C_BD) bytes)
-        *         tbase -> tx BD         (NUM_TX_BDS * sizeof(I2C_BD) bytes)
-        *                  tx buffer     (MAX_TX_SPACE bytes)
-        */
-
-       iip = (iic_t *)&immap->im_dprambase[dpaddr];
-       memset((void *)iip, 0, sizeof(iic_t));
-
-       rbase = dpaddr + 64;
-       tbase = rbase + NUM_RX_BDS * sizeof(I2C_BD);
-
-       /* Disable interrupts */
-       i2c->i2c_i2mod = 0x00;
-       i2c->i2c_i2cmr = 0x00;
-       i2c->i2c_i2cer = 0xff;
-       i2c->i2c_i2add = slaveadd;
-
-       /*
-        * Set the I2C BRG Clock division factor from desired i2c rate
-        * and current CPU rate (we assume sccr dfbgr field is 0;
-        * divide BRGCLK by 1)
-        */
-       debug("[I2C] Setting rate...\n");
-       i2c_setrate(gd->arch.brg_clk, CONFIG_SYS_I2C_SPEED);
-
-       /* Set I2C controller in master mode */
-       i2c->i2c_i2com = 0x01;
-
-       /* Initialize Tx/Rx parameters */
-       iip->iic_rbase = rbase;
-       iip->iic_tbase = tbase;
-       rxbd = (I2C_BD *)((unsigned char *) &immap->
-                       im_dprambase[iip->iic_rbase]);
-       txbd = (I2C_BD *)((unsigned char *) &immap->
-                       im_dprambase[iip->iic_tbase]);
-
-       debug("[I2C] rbase = %04x\n", iip->iic_rbase);
-       debug("[I2C] tbase = %04x\n", iip->iic_tbase);
-       debug("[I2C] rxbd = %08x\n", (int) rxbd);
-       debug("[I2C] txbd = %08x\n", (int) txbd);
-
-       /* Set big endian byte order */
-       iip->iic_tfcr = 0x10;
-       iip->iic_rfcr = 0x10;
-
-       /* Set maximum receive size. */
-       iip->iic_mrblr = I2C_RXTX_LEN;
-
-       cp->cp_cpcr = mk_cr_cmd(CPM_CR_I2C_PAGE,
-                               CPM_CR_I2C_SBLOCK,
-                               0x00, CPM_CR_INIT_TRX) | CPM_CR_FLG;
-       do {
-               __asm__ __volatile__("eieio");
-       } while (cp->cp_cpcr & CPM_CR_FLG);
-
-       /* Clear events and interrupts */
-       i2c->i2c_i2cer = 0xff;
-       i2c->i2c_i2cmr = 0x00;
-}
-
-static
-void i2c_newio(i2c_state_t *state)
-{
-       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-       volatile iic_t *iip;
-       uint dpaddr;
-
-       debug("[I2C] i2c_newio\n");
-
-       dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)];
-       iip = (iic_t *)&immap->im_dprambase[dpaddr];
-       state->rx_idx = 0;
-       state->tx_idx = 0;
-       state->rxbd = (void *)&immap->im_dprambase[iip->iic_rbase];
-       state->txbd = (void *)&immap->im_dprambase[iip->iic_tbase];
-       state->tx_space = MAX_TX_SPACE;
-       state->tx_buf = (uchar *)state->txbd + NUM_TX_BDS * sizeof(I2C_BD);
-       state->err_cb = NULL;
-       state->cb_data = NULL;
-
-       debug("[I2C] rxbd = %08x\n", (int)state->rxbd);
-       debug("[I2C] txbd = %08x\n", (int)state->txbd);
-       debug("[I2C] tx_buf = %08x\n", (int)state->tx_buf);
-
-       /* clear the buffer memory */
-       memset((char *) state->tx_buf, 0, MAX_TX_SPACE);
-}
-
-static
-int i2c_send(i2c_state_t *state,
-            unsigned char address,
-            unsigned char secondary_address,
-            unsigned int flags, unsigned short size, unsigned char *dataout)
-{
-       volatile I2C_BD *txbd;
-       int i, j;
-
-       debug("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n",
-               address, secondary_address, flags, size);
-
-       /* trying to send message larger than BD */
-       if (size > I2C_RXTX_LEN)
-               return I2CERR_MSG_TOO_LONG;
-
-       /* no more free bds */
-       if (state->tx_idx >= NUM_TX_BDS || state->tx_space < (2 + size))
-               return I2CERR_NO_BUFFERS;
-
-       txbd = (I2C_BD *)state->txbd;
-       txbd->addr = state->tx_buf;
-
-       debug("[I2C] txbd = %08x\n", (int) txbd);
-
-       if (flags & I2CF_START_COND) {
-               debug("[I2C] Formatting addresses...\n");
-               if (flags & I2CF_ENABLE_SECONDARY) {
-                       /* Length of message plus dest addresses */
-                       txbd->length = size + 2;
-                       txbd->addr[0] = address << 1;
-                       txbd->addr[1] = secondary_address;
-                       i = 2;
-               } else {
-                       /* Length of message plus dest address */
-                       txbd->length = size + 1;
-                       /* Write destination address to BD */
-                       txbd->addr[0] = address << 1;
-                       i = 1;
-               }
-       } else {
-               txbd->length = size;    /* Length of message */
-               i = 0;
-       }
-
-       /* set up txbd */
-       txbd->status = BD_SC_READY;
-       if (flags & I2CF_START_COND)
-               txbd->status |= BD_I2C_TX_START;
-       if (flags & I2CF_STOP_COND)
-               txbd->status |= BD_SC_LAST | BD_SC_WRAP;
-
-       /* Copy data to send into buffer */
-       debug("[I2C] copy data...\n");
-       for (j = 0; j < size; i++, j++)
-               txbd->addr[i] = dataout[j];
-
-       debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
-               txbd->length, txbd->status, txbd->addr[0], txbd->addr[1]);
-
-       /* advance state */
-       state->tx_buf += txbd->length;
-       state->tx_space -= txbd->length;
-       state->tx_idx++;
-       state->txbd = (void *) (txbd + 1);
-
-       return 0;
-}
-
-static
-int i2c_receive(i2c_state_t *state,
-               unsigned char address,
-               unsigned char secondary_address,
-               unsigned int flags,
-               unsigned short size_to_expect, unsigned char *datain)
-{
-       volatile I2C_BD *rxbd, *txbd;
-
-       debug("[I2C] i2c_receive %02d %02d %02d\n", address,
-               secondary_address, flags);
-
-       /* Expected to receive too much */
-       if (size_to_expect > I2C_RXTX_LEN)
-               return I2CERR_MSG_TOO_LONG;
-
-       /* no more free bds */
-       if (state->tx_idx >= NUM_TX_BDS || state->rx_idx >= NUM_RX_BDS
-           || state->tx_space < 2)
-               return I2CERR_NO_BUFFERS;
-
-       rxbd = (I2C_BD *) state->rxbd;
-       txbd = (I2C_BD *) state->txbd;
-
-       debug("[I2C] rxbd = %08x\n", (int) rxbd);
-       debug("[I2C] txbd = %08x\n", (int) txbd);
-
-       txbd->addr = state->tx_buf;
-
-       /* set up TXBD for destination address */
-       if (flags & I2CF_ENABLE_SECONDARY) {
-               txbd->length = 2;
-               txbd->addr[0] = address << 1;   /* Write data */
-               txbd->addr[1] = secondary_address;      /* Internal address */
-               txbd->status = BD_SC_READY;
-       } else {
-               txbd->length = 1 + size_to_expect;
-               txbd->addr[0] = (address << 1) | 0x01;
-               txbd->status = BD_SC_READY;
-               memset(&txbd->addr[1], 0, txbd->length);
-       }
-
-       /* set up rxbd for reception */
-       rxbd->status = BD_SC_EMPTY;
-       rxbd->length = size_to_expect;
-       rxbd->addr = datain;
-
-       txbd->status |= BD_I2C_TX_START;
-       if (flags & I2CF_STOP_COND) {
-               txbd->status |= BD_SC_LAST | BD_SC_WRAP;
-               rxbd->status |= BD_SC_WRAP;
-       }
-
-       debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
-               txbd->length, txbd->status, txbd->addr[0], txbd->addr[1]);
-       debug("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
-               rxbd->length, rxbd->status, rxbd->addr[0], rxbd->addr[1]);
-
-       /* advance state */
-       state->tx_buf += txbd->length;
-       state->tx_space -= txbd->length;
-       state->tx_idx++;
-       state->txbd = (void *) (txbd + 1);
-       state->rx_idx++;
-       state->rxbd = (void *) (rxbd + 1);
-
-       return 0;
-}
-
-
-static
-int i2c_doio(i2c_state_t *state)
-{
-       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-       volatile iic_t *iip;
-       volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
-       volatile I2C_BD *txbd, *rxbd;
-       int n, i, b, rxcnt = 0, rxtimeo = 0, txcnt = 0, txtimeo = 0, rc = 0;
-       uint dpaddr;
-
-       debug("[I2C] i2c_doio\n");
-
-       if (state->tx_idx <= 0 && state->rx_idx <= 0) {
-               debug("[I2C] No I/O is queued\n");
-               return I2CERR_QUEUE_EMPTY;
-       }
-
-       dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)];
-       iip = (iic_t *)&immap->im_dprambase[dpaddr];
-       iip->iic_rbptr = iip->iic_rbase;
-       iip->iic_tbptr = iip->iic_tbase;
-
-       /* Enable I2C */
-       debug("[I2C] Enabling I2C...\n");
-       i2c->i2c_i2mod |= 0x01;
-
-       /* Begin transmission */
-       i2c->i2c_i2com |= 0x80;
-
-       /* Loop until transmit & receive completed */
-
-       n = state->tx_idx;
-
-       if (n > 0) {
-
-               txbd = ((I2C_BD *) state->txbd) - n;
-               for (i = 0; i < n; i++) {
-                       txtimeo += TOUT_LOOP * txbd->length;
-                       txbd++;
-               }
-
-               txbd--;         /* wait until last in list is done */
-
-               debug("[I2C] Transmitting...(txbd=0x%08lx)\n",
-                       (ulong) txbd);
-
-               udelay(START_DELAY_US); /* give it time to start */
-               while ((txbd->status & BD_SC_READY) && (++txcnt < txtimeo)) {
-                       udelay(DELAY_US);
-                       if (ctrlc())
-                               return -1;
-                       __asm__ __volatile__("eieio");
-               }
-       }
-
-       n = state->rx_idx;
-
-       if (txcnt < txtimeo && n > 0) {
-
-               rxbd = ((I2C_BD *) state->rxbd) - n;
-               for (i = 0; i < n; i++) {
-                       rxtimeo += TOUT_LOOP * rxbd->length;
-                       rxbd++;
-               }
-
-               rxbd--;         /* wait until last in list is done */
-
-               debug("[I2C] Receiving...(rxbd=0x%08lx)\n", (ulong) rxbd);
-
-               udelay(START_DELAY_US); /* give it time to start */
-               while ((rxbd->status & BD_SC_EMPTY) && (++rxcnt < rxtimeo)) {
-                       udelay(DELAY_US);
-                       if (ctrlc())
-                               return -1;
-                       __asm__ __volatile__("eieio");
-               }
-       }
-
-       /* Turn off I2C */
-       i2c->i2c_i2mod &= ~0x01;
-
-       n = state->tx_idx;
-
-       if (n > 0) {
-               for (i = 0; i < n; i++) {
-                       txbd = ((I2C_BD *) state->txbd) - (n - i);
-                       b = txbd->status & BD_I2C_TX_ERR;
-                       if (b != 0) {
-                               if (state->err_cb != NULL)
-                                       (*state->err_cb) (I2CECB_TX_ERR | b,
-                                                         i, state->cb_data);
-                               if (rc == 0)
-                                       rc = I2CERR_IO_ERROR;
-                       }
-               }
-       }
-
-       n = state->rx_idx;
-
-       if (n > 0) {
-               for (i = 0; i < n; i++) {
-                       rxbd = ((I2C_BD *) state->rxbd) - (n - i);
-                       b = rxbd->status & BD_I2C_RX_ERR;
-                       if (b != 0) {
-                               if (state->err_cb != NULL)
-                                       (*state->err_cb) (I2CECB_RX_ERR | b,
-                                                         i, state->cb_data);
-                               if (rc == 0)
-                                       rc = I2CERR_IO_ERROR;
-                       }
-               }
-       }
-
-       if ((txtimeo > 0 && txcnt >= txtimeo) ||
-           (rxtimeo > 0 && rxcnt >= rxtimeo)) {
-               if (state->err_cb != NULL)
-                       (*state->err_cb) (I2CECB_TIMEOUT, -1, state->cb_data);
-               if (rc == 0)
-                       rc = I2CERR_TIMEOUT;
-       }
-
-       return rc;
-}
-
-static void i2c_probe_callback(int flags, int xnum, void *data)
-{
-       /*
-        * the only acceptable errors are a transmit NAK or a receive
-        * overrun - tx NAK means the device does not exist, rx OV
-        * means the device must have responded to the slave address
-        * even though the transfer failed
-        */
-       if (flags == (I2CECB_TX_ERR | I2CECB_TX_NAK))
-               *(int *) data |= 1;
-       if (flags == (I2CECB_RX_ERR | I2CECB_RX_OV))
-               *(int *) data |= 2;
-}
-
-int i2c_probe(uchar chip)
-{
-       i2c_state_t state;
-       int rc, err_flag;
-       uchar buf[1];
-
-       i2c_newio(&state);
-
-       state.err_cb = i2c_probe_callback;
-       state.cb_data = (void *) &err_flag;
-       err_flag = 0;
-
-       rc = i2c_receive(&state, chip, 0, I2CF_START_COND | I2CF_STOP_COND, 1,
-                        buf);
-
-       if (rc != 0)
-               return rc;      /* probe failed */
-
-       rc = i2c_doio(&state);
-
-       if (rc == 0)
-               return 0;       /* device exists - read succeeded */
-
-       if (rc == I2CERR_TIMEOUT)
-               return -1;      /* device does not exist - timeout */
-
-       if (rc != I2CERR_IO_ERROR || err_flag == 0)
-               return rc;      /* probe failed */
-
-       if (err_flag & 1)
-               return -1;      /* device does not exist - had transmit NAK */
-
-       return 0;               /* device exists - had receive overrun */
-}
-
-
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
-       i2c_state_t state;
-       uchar xaddr[4];
-       int rc;
-
-       xaddr[0] = (addr >> 24) & 0xFF;
-       xaddr[1] = (addr >> 16) & 0xFF;
-       xaddr[2] = (addr >> 8) & 0xFF;
-       xaddr[3] = addr & 0xFF;
-
-#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
-       /*
-        * EEPROM chips that implement "address overflow" are ones
-        * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address
-        * and the extra bits end up in the "chip address" bit slots.
-        * This makes a 24WC08 (1Kbyte) chip look like four 256 byte
-        * chips.
-        *
-        * Note that we consider the length of the address field to still
-        * be one byte because the extra address bits are hidden in the
-        * chip address.
-        */
-       chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
-#endif
-
-       i2c_newio(&state);
-
-       rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
-                     &xaddr[4 - alen]);
-       if (rc != 0) {
-               printf("i2c_read: i2c_send failed (%d)\n", rc);
-               return 1;
-       }
-
-       rc = i2c_receive(&state, chip, 0, I2CF_STOP_COND, len, buffer);
-       if (rc != 0) {
-               printf("i2c_read: i2c_receive failed (%d)\n", rc);
-               return 1;
-       }
-
-       rc = i2c_doio(&state);
-       if (rc != 0) {
-               printf("i2c_read: i2c_doio failed (%d)\n", rc);
-               return 1;
-       }
-       return 0;
-}
-
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
-       i2c_state_t state;
-       uchar xaddr[4];
-       int rc;
-
-       xaddr[0] = (addr >> 24) & 0xFF;
-       xaddr[1] = (addr >> 16) & 0xFF;
-       xaddr[2] = (addr >> 8) & 0xFF;
-       xaddr[3] = addr & 0xFF;
-
-#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
-       /*
-        * EEPROM chips that implement "address overflow" are ones
-        * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address
-        * and the extra bits end up in the "chip address" bit slots.
-        * This makes a 24WC08 (1Kbyte) chip look like four 256 byte
-        * chips.
-        *
-        * Note that we consider the length of the address field to still
-        * be one byte because the extra address bits are hidden in the
-        * chip address.
-        */
-       chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
-#endif
-
-       i2c_newio(&state);
-
-       rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
-                     &xaddr[4 - alen]);
-       if (rc != 0) {
-               printf("i2c_write: first i2c_send failed (%d)\n", rc);
-               return 1;
-       }
-
-       rc = i2c_send(&state, 0, 0, I2CF_STOP_COND, len, buffer);
-       if (rc != 0) {
-               printf("i2c_write: second i2c_send failed (%d)\n", rc);
-               return 1;
-       }
-
-       rc = i2c_doio(&state);
-       if (rc != 0) {
-               printf("i2c_write: i2c_doio failed (%d)\n", rc);
-               return 1;
-       }
-       return 0;
-}
-
-#if defined(CONFIG_I2C_MULTI_BUS)
-/*
- * Functions for multiple I2C bus handling
- */
-unsigned int i2c_get_bus_num(void)
-{
-       return i2c_bus_num;
-}
-
-int i2c_set_bus_num(unsigned int bus)
-{
-       if (bus >= CONFIG_SYS_MAX_I2C_BUS)
-               return -1;
-       i2c_bus_num = bus;
-       return 0;
-}
-
-#endif /* CONFIG_I2C_MULTI_BUS */
-#endif /* CONFIG_HARD_I2C */
index 6f81fee571b55c9110aa09c81d804551f5dbc610..fc91a054f0e029123db3896623f04a1080f52a1d 100644 (file)
@@ -14,7 +14,6 @@ obj-y += cpu.o
 obj-y  += cpu_init.o
 obj-y  += fec.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
-obj-y  += i2c.o
 obj-y  += interrupts.o
 obj-y  += scc.o
 obj-y  += serial.o
diff --git a/arch/powerpc/cpu/mpc8xx/i2c.c b/arch/powerpc/cpu/mpc8xx/i2c.c
deleted file mode 100644 (file)
index 54d5cb5..0000000
+++ /dev/null
@@ -1,672 +0,0 @@
-/*
- * (C) Copyright 2000
- * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
- *
- * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- *
- * Back ported to the 8xx platform (from the 8260 platform) by
- * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
- */
-
-#include <common.h>
-#include <console.h>
-
-#ifdef CONFIG_HARD_I2C
-
-#include <commproc.h>
-#include <i2c.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* tx/rx timeout (we need the i2c early, so we don't use get_timer()) */
-#define TOUT_LOOP 1000000
-
-#define NUM_RX_BDS 4
-#define NUM_TX_BDS 4
-#define MAX_TX_SPACE 256
-#define I2C_RXTX_LEN 128       /* maximum tx/rx buffer length */
-
-typedef struct I2C_BD {
-       unsigned short status;
-       unsigned short length;
-       unsigned char *addr;
-} I2C_BD;
-
-#define BD_I2C_TX_START 0x0400 /* special status for i2c: Start condition */
-
-#define BD_I2C_TX_CL   0x0001  /* collision error */
-#define BD_I2C_TX_UN   0x0002  /* underflow error */
-#define BD_I2C_TX_NAK  0x0004  /* no acknowledge error */
-#define BD_I2C_TX_ERR  (BD_I2C_TX_NAK|BD_I2C_TX_UN|BD_I2C_TX_CL)
-
-#define BD_I2C_RX_ERR  BD_SC_OV
-
-typedef void (*i2c_ecb_t) (int, int);  /* error callback function */
-
-/* This structure keeps track of the bd and buffer space usage. */
-typedef struct i2c_state {
-       int rx_idx;             /* index   to next free Rx BD */
-       int tx_idx;             /* index   to next free Tx BD */
-       void *rxbd;             /* pointer to next free Rx BD */
-       void *txbd;             /* pointer to next free Tx BD */
-       int tx_space;           /* number  of Tx bytes left   */
-       unsigned char *tx_buf;  /* pointer to free Tx area    */
-       i2c_ecb_t err_cb;       /* error callback function    */
-} i2c_state_t;
-
-
-/* flags for i2c_send() and i2c_receive() */
-#define I2CF_ENABLE_SECONDARY  0x01  /* secondary_address is valid           */
-#define I2CF_START_COND                0x02  /* tx: generate start condition         */
-#define I2CF_STOP_COND         0x04  /* tx: generate stop  condition         */
-
-/* return codes */
-#define I2CERR_NO_BUFFERS      0x01  /* no more BDs or buffer space          */
-#define I2CERR_MSG_TOO_LONG    0x02  /* tried to send/receive to much data   */
-#define I2CERR_TIMEOUT         0x03  /* timeout in i2c_doio()                */
-#define I2CERR_QUEUE_EMPTY     0x04  /* i2c_doio called without send/receive */
-
-/* error callback flags */
-#define I2CECB_RX_ERR          0x10  /* this is a receive error              */
-#define     I2CECB_RX_ERR_OV   0x02  /* receive overrun error                */
-#define     I2CECB_RX_MASK     0x0f  /* mask for error bits                  */
-#define I2CECB_TX_ERR          0x20  /* this is a transmit error             */
-#define     I2CECB_TX_CL       0x01  /* transmit collision error             */
-#define     I2CECB_TX_UN       0x02  /* transmit underflow error             */
-#define     I2CECB_TX_NAK      0x04  /* transmit no ack error                */
-#define     I2CECB_TX_MASK     0x0f  /* mask for error bits                  */
-#define I2CECB_TIMEOUT         0x40  /* this is a timeout error              */
-
-/*
- * Returns the best value of I2BRG to meet desired clock speed of I2C with
- * input parameters (clock speed, filter, and predivider value).
- * It returns computer speed value and the difference between it and desired
- * speed.
- */
-static inline int
-i2c_roundrate(int hz, int speed, int filter, int modval,
-             int *brgval, int *totspeed)
-{
-       int moddiv = 1 << (5 - (modval & 3)), brgdiv, div;
-
-       debug("\t[I2C] trying hz=%d, speed=%d, filter=%d, modval=%d\n",
-               hz, speed, filter, modval);
-
-       div = moddiv * speed;
-       brgdiv = (hz + div - 1) / div;
-
-       debug("\t\tmoddiv=%d, brgdiv=%d\n", moddiv, brgdiv);
-
-       *brgval = ((brgdiv + 1) / 2) - 3 - (2 * filter);
-
-       if ((*brgval < 0) || (*brgval > 255)) {
-               debug("\t\trejected brgval=%d\n", *brgval);
-               return -1;
-       }
-
-       brgdiv = 2 * (*brgval + 3 + (2 * filter));
-       div = moddiv * brgdiv;
-       *totspeed = hz / div;
-
-       debug("\t\taccepted brgval=%d, totspeed=%d\n", *brgval, *totspeed);
-
-       return 0;
-}
-
-/*
- * Sets the I2C clock predivider and divider to meet required clock speed.
- */
-static int i2c_setrate(int hz, int speed)
-{
-       immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-       volatile i2c8xx_t *i2c = (i2c8xx_t *) & immap->im_i2c;
-       int     brgval,
-               modval, /* 0-3 */
-               bestspeed_diff = speed,
-               bestspeed_brgval = 0,
-               bestspeed_modval = 0,
-               bestspeed_filter = 0,
-               totspeed,
-               filter = 0;     /* Use this fixed value */
-
-       for (modval = 0; modval < 4; modval++) {
-               if (i2c_roundrate
-                   (hz, speed, filter, modval, &brgval, &totspeed) == 0) {
-                       int diff = speed - totspeed;
-
-                       if ((diff >= 0) && (diff < bestspeed_diff)) {
-                               bestspeed_diff = diff;
-                               bestspeed_modval = modval;
-                               bestspeed_brgval = brgval;
-                               bestspeed_filter = filter;
-                       }
-               }
-       }
-
-       debug("[I2C] Best is:\n");
-       debug("[I2C] CPU=%dhz RATE=%d F=%d I2MOD=%08x I2BRG=%08x DIFF=%dhz\n",
-               hz,
-               speed,
-               bestspeed_filter,
-               bestspeed_modval,
-               bestspeed_brgval,
-               bestspeed_diff);
-
-       i2c->i2c_i2mod |=
-               ((bestspeed_modval & 3) << 1) | (bestspeed_filter << 3);
-       i2c->i2c_i2brg = bestspeed_brgval & 0xff;
-
-       debug("[I2C] i2mod=%08x i2brg=%08x\n",
-               i2c->i2c_i2mod,
-               i2c->i2c_i2brg);
-
-       return 1;
-}
-
-void i2c_init(int speed, int slaveaddr)
-{
-       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-       volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
-       volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
-       volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
-       ulong rbase, tbase;
-       volatile I2C_BD *rxbd, *txbd;
-       uint dpaddr;
-
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-       /* call board specific i2c bus reset routine before accessing the   */
-       /* environment, which might be in a chip on that bus. For details   */
-       /* about this problem see doc/I2C_Edge_Conditions.                  */
-       i2c_init_board();
-#endif
-
-#ifdef CONFIG_SYS_I2C_UCODE_PATCH
-       iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
-#else
-       /* Disable relocation */
-       iip->iic_rpbase = 0;
-#endif
-
-       dpaddr = CPM_I2C_BASE;
-
-       /*
-        * initialise data in dual port ram:
-        *
-        * dpaddr->rbase -> rx BD         (NUM_RX_BDS * sizeof(I2C_BD) bytes)
-        *         tbase -> tx BD         (NUM_TX_BDS * sizeof(I2C_BD) bytes)
-        *                  tx buffer     (MAX_TX_SPACE bytes)
-        */
-
-       rbase = dpaddr;
-       tbase = rbase + NUM_RX_BDS * sizeof(I2C_BD);
-
-       /* Initialize Port B I2C pins. */
-       cp->cp_pbpar |= 0x00000030;
-       cp->cp_pbdir |= 0x00000030;
-       cp->cp_pbodr |= 0x00000030;
-
-       /* Disable interrupts */
-       i2c->i2c_i2mod = 0x00;
-       i2c->i2c_i2cmr = 0x00;
-       i2c->i2c_i2cer = 0xff;
-       i2c->i2c_i2add = slaveaddr;
-
-       /*
-        * Set the I2C BRG Clock division factor from desired i2c rate
-        * and current CPU rate (we assume sccr dfbgr field is 0;
-        * divide BRGCLK by 1)
-        */
-       debug("[I2C] Setting rate...\n");
-       i2c_setrate(gd->cpu_clk, CONFIG_SYS_I2C_SPEED);
-
-       /* Set I2C controller in master mode */
-       i2c->i2c_i2com = 0x01;
-
-       /* Set SDMA bus arbitration level to 5 (SDCR) */
-       immap->im_siu_conf.sc_sdcr = 0x0001;
-
-       /* Initialize Tx/Rx parameters */
-       iip->iic_rbase = rbase;
-       iip->iic_tbase = tbase;
-       rxbd = (I2C_BD *) ((unsigned char *) &cp->cp_dpmem[iip->iic_rbase]);
-       txbd = (I2C_BD *) ((unsigned char *) &cp->cp_dpmem[iip->iic_tbase]);
-
-       debug("[I2C] rbase = %04x\n", iip->iic_rbase);
-       debug("[I2C] tbase = %04x\n", iip->iic_tbase);
-       debug("[I2C] rxbd = %08x\n", (int)rxbd);
-       debug("[I2C] txbd = %08x\n", (int)txbd);
-
-       /* Set big endian byte order */
-       iip->iic_tfcr = 0x10;
-       iip->iic_rfcr = 0x10;
-
-       /* Set maximum receive size. */
-       iip->iic_mrblr = I2C_RXTX_LEN;
-
-#ifdef CONFIG_SYS_I2C_UCODE_PATCH
-       /*
-        *  Initialize required parameters if using microcode patch.
-        */
-       iip->iic_rbptr = iip->iic_rbase;
-       iip->iic_tbptr = iip->iic_tbase;
-       iip->iic_rstate = 0;
-       iip->iic_tstate = 0;
-#else
-       cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_I2C, CPM_CR_INIT_TRX) | CPM_CR_FLG;
-       do {
-               __asm__ __volatile__("eieio");
-       } while (cp->cp_cpcr & CPM_CR_FLG);
-#endif
-
-       /* Clear events and interrupts */
-       i2c->i2c_i2cer = 0xff;
-       i2c->i2c_i2cmr = 0x00;
-}
-
-static void i2c_newio(i2c_state_t *state)
-{
-       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-       volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
-       volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
-
-       debug("[I2C] i2c_newio\n");
-
-#ifdef CONFIG_SYS_I2C_UCODE_PATCH
-       iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
-#endif
-       state->rx_idx = 0;
-       state->tx_idx = 0;
-       state->rxbd = (void *)&cp->cp_dpmem[iip->iic_rbase];
-       state->txbd = (void *)&cp->cp_dpmem[iip->iic_tbase];
-       state->tx_space = MAX_TX_SPACE;
-       state->tx_buf = (uchar *)state->txbd + NUM_TX_BDS * sizeof(I2C_BD);
-       state->err_cb = NULL;
-
-       debug("[I2C] rxbd = %08x\n", (int)state->rxbd);
-       debug("[I2C] txbd = %08x\n", (int)state->txbd);
-       debug("[I2C] tx_buf = %08x\n", (int)state->tx_buf);
-
-       /* clear the buffer memory */
-       memset((char *)state->tx_buf, 0, MAX_TX_SPACE);
-}
-
-static int
-i2c_send(i2c_state_t *state,
-        unsigned char address,
-        unsigned char secondary_address,
-        unsigned int flags, unsigned short size, unsigned char *dataout)
-{
-       volatile I2C_BD *txbd;
-       int i, j;
-
-       debug("[I2C] i2c_send add=%02d sec=%02d flag=%02d size=%d\n",
-               address, secondary_address, flags, size);
-
-       /* trying to send message larger than BD */
-       if (size > I2C_RXTX_LEN)
-               return I2CERR_MSG_TOO_LONG;
-
-       /* no more free bds */
-       if (state->tx_idx >= NUM_TX_BDS || state->tx_space < (2 + size))
-               return I2CERR_NO_BUFFERS;
-
-       txbd = (I2C_BD *) state->txbd;
-       txbd->addr = state->tx_buf;
-
-       debug("[I2C] txbd = %08x\n", (int)txbd);
-
-       if (flags & I2CF_START_COND) {
-               debug("[I2C] Formatting addresses...\n");
-               if (flags & I2CF_ENABLE_SECONDARY) {
-                       /* Length of msg + dest addr */
-                       txbd->length = size + 2;
-
-                       txbd->addr[0] = address << 1;
-                       txbd->addr[1] = secondary_address;
-                       i = 2;
-               } else {
-                       /* Length of msg + dest addr */
-                       txbd->length = size + 1;
-                       /* Write dest addr to BD */
-                       txbd->addr[0] = address << 1;
-                       i = 1;
-               }
-       } else {
-               txbd->length = size;    /* Length of message */
-               i = 0;
-       }
-
-       /* set up txbd */
-       txbd->status = BD_SC_READY;
-       if (flags & I2CF_START_COND)
-               txbd->status |= BD_I2C_TX_START;
-       if (flags & I2CF_STOP_COND)
-               txbd->status |= BD_SC_LAST | BD_SC_WRAP;
-
-       /* Copy data to send into buffer */
-       debug("[I2C] copy data...\n");
-       for(j = 0; j < size; i++, j++)
-               txbd->addr[i] = dataout[j];
-
-       debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
-               txbd->length,
-               txbd->status,
-               txbd->addr[0],
-               txbd->addr[1]);
-
-       /* advance state */
-       state->tx_buf += txbd->length;
-       state->tx_space -= txbd->length;
-       state->tx_idx++;
-       state->txbd = (void *) (txbd + 1);
-
-       return 0;
-}
-
-static int
-i2c_receive(i2c_state_t *state,
-           unsigned char address,
-           unsigned char secondary_address,
-           unsigned int flags,
-           unsigned short size_to_expect, unsigned char *datain)
-{
-       volatile I2C_BD *rxbd, *txbd;
-
-       debug("[I2C] i2c_receive %02d %02d %02d\n",
-               address, secondary_address, flags);
-
-       /* Expected to receive too much */
-       if (size_to_expect > I2C_RXTX_LEN)
-               return I2CERR_MSG_TOO_LONG;
-
-       /* no more free bds */
-       if (state->tx_idx >= NUM_TX_BDS || state->rx_idx >= NUM_RX_BDS
-           || state->tx_space < 2)
-               return I2CERR_NO_BUFFERS;
-
-       rxbd = (I2C_BD *) state->rxbd;
-       txbd = (I2C_BD *) state->txbd;
-
-       debug("[I2C] rxbd = %08x\n", (int)rxbd);
-       debug("[I2C] txbd = %08x\n", (int)txbd);
-
-       txbd->addr = state->tx_buf;
-
-       /* set up TXBD for destination address */
-       if (flags & I2CF_ENABLE_SECONDARY) {
-               txbd->length = 2;
-               txbd->addr[0] = address << 1;   /* Write data */
-               txbd->addr[1] = secondary_address;      /* Internal address */
-               txbd->status = BD_SC_READY;
-       } else {
-               txbd->length = 1 + size_to_expect;
-               txbd->addr[0] = (address << 1) | 0x01;
-               txbd->status = BD_SC_READY;
-               memset(&txbd->addr[1], 0, txbd->length);
-       }
-
-       /* set up rxbd for reception */
-       rxbd->status = BD_SC_EMPTY;
-       rxbd->length = size_to_expect;
-       rxbd->addr = datain;
-
-       txbd->status |= BD_I2C_TX_START;
-       if (flags & I2CF_STOP_COND) {
-               txbd->status |= BD_SC_LAST | BD_SC_WRAP;
-               rxbd->status |= BD_SC_WRAP;
-       }
-
-       debug("[I2C] txbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
-               txbd->length,
-               txbd->status,
-               txbd->addr[0],
-               txbd->addr[1]);
-       debug("[I2C] rxbd: length=0x%04x status=0x%04x addr[0]=0x%02x addr[1]=0x%02x\n",
-               rxbd->length,
-               rxbd->status,
-               rxbd->addr[0],
-               rxbd->addr[1]);
-
-       /* advance state */
-       state->tx_buf += txbd->length;
-       state->tx_space -= txbd->length;
-       state->tx_idx++;
-       state->txbd = (void *) (txbd + 1);
-       state->rx_idx++;
-       state->rxbd = (void *) (rxbd + 1);
-
-       return 0;
-}
-
-
-static int i2c_doio(i2c_state_t *state)
-{
-       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-       volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
-       volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
-       volatile iic_t *iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
-       volatile I2C_BD *txbd, *rxbd;
-       volatile int j = 0;
-
-       debug("[I2C] i2c_doio\n");
-
-#ifdef CONFIG_SYS_I2C_UCODE_PATCH
-       iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
-#endif
-
-       if (state->tx_idx <= 0 && state->rx_idx <= 0) {
-               debug("[I2C] No I/O is queued\n");
-               return I2CERR_QUEUE_EMPTY;
-       }
-
-       iip->iic_rbptr = iip->iic_rbase;
-       iip->iic_tbptr = iip->iic_tbase;
-
-       /* Enable I2C */
-       debug("[I2C] Enabling I2C...\n");
-       i2c->i2c_i2mod |= 0x01;
-
-       /* Begin transmission */
-       i2c->i2c_i2com |= 0x80;
-
-       /* Loop until transmit & receive completed */
-
-       if (state->tx_idx > 0) {
-               txbd = ((I2C_BD*)state->txbd) - 1;
-
-               debug("[I2C] Transmitting...(txbd=0x%08lx)\n",
-                       (ulong)txbd);
-
-               while ((txbd->status & BD_SC_READY) && (j++ < TOUT_LOOP)) {
-                       if (ctrlc())
-                               return (-1);
-
-                       __asm__ __volatile__("eieio");
-               }
-       }
-
-       if ((state->rx_idx > 0) && (j < TOUT_LOOP)) {
-               rxbd = ((I2C_BD*)state->rxbd) - 1;
-
-               debug("[I2C] Receiving...(rxbd=0x%08lx)\n",
-                       (ulong)rxbd);
-
-               while ((rxbd->status & BD_SC_EMPTY) && (j++ < TOUT_LOOP)) {
-                       if (ctrlc())
-                               return (-1);
-
-                       __asm__ __volatile__("eieio");
-               }
-       }
-
-       /* Turn off I2C */
-       i2c->i2c_i2mod &= ~0x01;
-
-       if (state->err_cb != NULL) {
-               int n, i, b;
-
-               /*
-                * if we have an error callback function, look at the
-                * error bits in the bd status and pass them back
-                */
-
-               if ((n = state->tx_idx) > 0) {
-                       for (i = 0; i < n; i++) {
-                               txbd = ((I2C_BD *) state->txbd) - (n - i);
-                               if ((b = txbd->status & BD_I2C_TX_ERR) != 0)
-                                       (*state->err_cb) (I2CECB_TX_ERR | b,
-                                                         i);
-                       }
-               }
-
-               if ((n = state->rx_idx) > 0) {
-                       for (i = 0; i < n; i++) {
-                               rxbd = ((I2C_BD *) state->rxbd) - (n - i);
-                               if ((b = rxbd->status & BD_I2C_RX_ERR) != 0)
-                                       (*state->err_cb) (I2CECB_RX_ERR | b,
-                                                         i);
-                       }
-               }
-
-               if (j >= TOUT_LOOP)
-                       (*state->err_cb) (I2CECB_TIMEOUT, 0);
-       }
-
-       return (j >= TOUT_LOOP) ? I2CERR_TIMEOUT : 0;
-}
-
-static int had_tx_nak;
-
-static void i2c_test_callback(int flags, int xnum)
-{
-       if ((flags & I2CECB_TX_ERR) && (flags & I2CECB_TX_NAK))
-               had_tx_nak = 1;
-}
-
-int i2c_probe(uchar chip)
-{
-       i2c_state_t state;
-       int rc;
-       uchar buf[1];
-
-       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-
-       i2c_newio(&state);
-
-       state.err_cb = i2c_test_callback;
-       had_tx_nak = 0;
-
-       rc = i2c_receive(&state, chip, 0, I2CF_START_COND | I2CF_STOP_COND, 1,
-                        buf);
-
-       if (rc != 0)
-               return (rc);
-
-       rc = i2c_doio(&state);
-
-       if ((rc != 0) && (rc != I2CERR_TIMEOUT))
-               return (rc);
-
-       return (had_tx_nak);
-}
-
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
-       i2c_state_t state;
-       uchar xaddr[4];
-       int rc;
-
-       xaddr[0] = (addr >> 24) & 0xFF;
-       xaddr[1] = (addr >> 16) & 0xFF;
-       xaddr[2] = (addr >> 8) & 0xFF;
-       xaddr[3] = addr & 0xFF;
-
-#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
-       /*
-        * EEPROM chips that implement "address overflow" are ones like
-        * Catalyst 24WC04/08/16 which has 9/10/11 bits of address and the
-        * extra bits end up in the "chip address" bit slots.  This makes
-        * a 24WC08 (1Kbyte) chip look like four 256 byte chips.
-        *
-        * Note that we consider the length of the address field to still
-        * be one byte because the extra address bits are hidden in the
-        * chip address.
-        */
-       chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
-#endif
-
-       i2c_newio(&state);
-
-       rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
-                     &xaddr[4 - alen]);
-       if (rc != 0) {
-               printf("i2c_read: i2c_send failed (%d)\n", rc);
-               return 1;
-       }
-
-       rc = i2c_receive(&state, chip, 0, I2CF_STOP_COND, len, buffer);
-       if (rc != 0) {
-               printf("i2c_read: i2c_receive failed (%d)\n", rc);
-               return 1;
-       }
-
-       rc = i2c_doio(&state);
-       if (rc != 0) {
-               printf("i2c_read: i2c_doio failed (%d)\n", rc);
-               return 1;
-       }
-       return 0;
-}
-
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
-       i2c_state_t state;
-       uchar xaddr[4];
-       int rc;
-
-       xaddr[0] = (addr >> 24) & 0xFF;
-       xaddr[1] = (addr >> 16) & 0xFF;
-       xaddr[2] = (addr >> 8) & 0xFF;
-       xaddr[3] = addr & 0xFF;
-
-#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
-       /*
-        * EEPROM chips that implement "address overflow" are ones like
-        * Catalyst 24WC04/08/16 which has 9/10/11 bits of address and the
-        * extra bits end up in the "chip address" bit slots.  This makes
-        * a 24WC08 (1Kbyte) chip look like four 256 byte chips.
-        *
-        * Note that we consider the length of the address field to still
-        * be one byte because the extra address bits are hidden in the
-        * chip address.
-        */
-       chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
-#endif
-
-       i2c_newio(&state);
-
-       rc = i2c_send(&state, chip, 0, I2CF_START_COND, alen,
-                     &xaddr[4 - alen]);
-       if (rc != 0) {
-               printf("i2c_write: first i2c_send failed (%d)\n", rc);
-               return 1;
-       }
-
-       rc = i2c_send(&state, 0, 0, I2CF_STOP_COND, len, buffer);
-       if (rc != 0) {
-               printf("i2c_write: second i2c_send failed (%d)\n", rc);
-               return 1;
-       }
-
-       rc = i2c_doio(&state);
-       if (rc != 0) {
-               printf("i2c_write: i2c_doio failed (%d)\n", rc);
-               return 1;
-       }
-       return 0;
-}
-
-#endif /* CONFIG_HARD_I2C */
index 92a83849ac1632550b2ed2b64dfbf503c90121d3..89e033e1c592a0421cb5dc4d109b706192ca64cd 100644 (file)
@@ -83,7 +83,6 @@ CONFIG_MCFTMR         -- define to use DMA timer
 CONFIG_MCFPIT          -- define to use PIT timer
 
 CONFIG_SYS_I2C_FSL     -- define to use FSL common I2C driver
-CONFIG_HARD_I2C                -- define for I2C hardware support
 CONFIG_SYS_I2C_SOFT    -- define for I2C bit-banged
 CONFIG_SYS_I2C_SPEED           -- define for I2C speed
 CONFIG_SYS_I2C_SLAVE           -- define for I2C slave address
index 224e79c46aa3ca94e2310b44f41250c2516a1d28..2fca12c4170613f9f64d185534145e7f7b1badf2 100644 (file)
@@ -91,7 +91,6 @@ CONFIG_MCFTMR                 -- define to use DMA timer
 CONFIG_MCFPIT                  -- define to use PIT timer
 
 CONFIG_SYS_I2C_FSL             -- define to use FSL common I2C driver
-CONFIG_HARD_I2C                        -- define for I2C hardware support
 CONFIG_SYS_I2C_SOFT            -- define for I2C bit-banged
 CONFIG_SYS_I2C_SPEED           -- define for I2C speed
 CONFIG_SYS_I2C_SLAVE           -- define for I2C slave address
index 582e0c3d9e7fb1df86347aec297c1767bb97869f..757f0abdd74481a94498343297f31d48bc731984 100644 (file)
@@ -90,7 +90,6 @@ CONFIG_MCFTMR         -- define to use DMA timer
 CONFIG_MCFPIT          -- define to use PIT timer
 
 CONFIG_SYS_I2C_FSL     -- define to use FSL common I2C driver
-CONFIG_HARD_I2C                -- define for I2C hardware support
 CONFIG_SYS_I2C_SOFT    -- define for I2C bit-banged
 CONFIG_SYS_I2C_SPEED           -- define for I2C speed
 CONFIG_SYS_I2C_SLAVE           -- define for I2C slave address
index c563ad99a7cc93183b269b9e56ac0b8598628959..4a8719333ac5f8de9f3ff583e8ac111af97bc30e 100644 (file)
@@ -113,7 +113,6 @@ CONFIG_MCFTMR               -- define to use DMA timer
 CONFIG_MCFPIT          -- define to use PIT timer
 
 CONFIG_SYS_FSL_I2C     -- define to use FSL common I2C driver
-CONFIG_HARD_I2C                -- define for I2C hardware support
 CONFIG_SYS_I2C_SOFT    -- define for I2C bit-banged
 CONFIG_SYS_I2C_SPEED           -- define for I2C speed
 CONFIG_SYS_I2C_SLAVE           -- define for I2C slave address
index 30c5dedafe69728069be142ea8cff69658f9f2f5..ce7b27b8b2d399eff6875afd00cd771df39b3384 100644 (file)
@@ -98,7 +98,6 @@ CONFIG_DOS_PARTITION  -- enable DOS read/write
 CONFIG_SLTTMR          -- define to use SLT timer
 
 CONFIG_SYS_I2C_FSL     -- define to use FSL common I2C driver
-CONFIG_HARD_I2C                -- define for I2C hardware support
 CONFIG_SYS_I2C_SOFT    -- define for I2C bit-banged
 CONFIG_SYS_I2C_SPEED           -- define for I2C speed
 CONFIG_SYS_I2C_SLAVE           -- define for I2C slave address