powerpc/mpc85xx: fix TLB alignment
authorScott Wood <scottwood@freescale.com>
Thu, 20 Sep 2012 23:34:49 +0000 (18:34 -0500)
committerScott Wood <scottwood@freescale.com>
Mon, 26 Nov 2012 21:41:22 +0000 (15:41 -0600)
In the RAMBOOT/SPL case we were creating a TLB entry starting at
CONFIG_SYS_MONITOR_BASE, and just hoping that the base was properly
aligned for the TLB entry size.  This turned out to not be the case
with NAND SPL because the main U-Boot starts at an offset into the image
in order to skip the SPL itself.

Fix the TLB entry to always start at a proper alignment.  We still assume that
CONFIG_SYS_MONITOR_BASE doesn't start immediately before a large-page boundary
thus requiring multiple TLB entries.

Signed-off-by: Scott Wood <scottwood@frescale.com>
Cc: Andy Fleming <afleming@freescale.com>
arch/powerpc/cpu/mpc85xx/start.S

index 7912a4b2496e5437404fec01231ddef3c2790804..577d6874ba6ccf41608b8570108509cd8b7d4104 100644 (file)
@@ -1046,8 +1046,8 @@ create_init_ram_area:
        */
        create_tlb1_entry 15, \
                1, BOOKE_PAGESZ_1M, \
-               CONFIG_SYS_MONITOR_BASE, MAS2_I|MAS2_G, \
-               CONFIG_SYS_PBI_FLASH_WINDOW, MAS3_SX|MAS3_SW|MAS3_SR, \
+               CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \
+               CONFIG_SYS_PBI_FLASH_WINDOW & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \
                0, r6
 #else
        /*
@@ -1056,8 +1056,8 @@ create_init_ram_area:
         */
        create_tlb1_entry 15, \
                1, BOOKE_PAGESZ_1M, \
-               CONFIG_SYS_MONITOR_BASE, MAS2_I|MAS2_G, \
-               CONFIG_SYS_MONITOR_BASE, MAS3_SX|MAS3_SW|MAS3_SR, \
+               CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \
+               CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \
                0, r6
 #endif