fix DaVinci NS16550_REG_SIZE regression

Update the DaVinci DM6446 boards to use the new convention
for CONFIG_SYS_NS16550_REG_SIZE ... the size hasn't changed
from the original 4 bytes, but these chips are little-endian.

(Resolves a regression added recently by the include/ns16550.h
patch to "Unify structure declaration for registers".  The code
previously worked just fine because the registers were accessed
as host-endian words, not as bytes.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h
index b43beaa03e8c9b5fcf5cc96b34c3d35189a26e13..fae430ba6f89dc4aebe465f06179cf9d976862a0 100644 (file)
--- a/include/configs/davinci_dvevm.h
+++ b/include/configs/davinci_dvevm.h
@@ -85,7 +85,7 @@
 /*====================*/
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    4               /* NS16550 register size */
+#define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1        0x01c20000      /* Base address of UART0 */
 #define CONFIG_SYS_NS16550_CLK         27000000        /* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX      1               /* use UART0 for console */

diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h
index 2c97a00167a6ada524263e5ce5545c44e4fe6125..923e4777be3e101f5dd66c701d196f4c1a502377 100644 (file)
--- a/include/configs/davinci_schmoogie.h
+++ b/include/configs/davinci_schmoogie.h
@@ -52,7 +52,7 @@
 /*====================*/
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    4               /* NS16550 register size */
+#define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1        0x01c20000      /* Base address of UART0 */
 #define CONFIG_SYS_NS16550_CLK         27000000        /* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX      1               /* use UART0 for console */

diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
index 9354c2ffb0d87071876654eb5a2ab89e70ca1394..73a59db8713e7414d57a73865f2db4e295755b74 100644 (file)
--- a/include/configs/davinci_sffsdr.h
+++ b/include/configs/davinci_sffsdr.h
@@ -54,7 +54,7 @@
 /* Serial Driver info */
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    4               /* NS16550 register size */
+#define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1        0x01c20000      /* Base address of UART0 */
 #define CONFIG_SYS_NS16550_CLK         27000000        /* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX      1               /* use UART0 for console */

diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
index 0865d0d33b83a7622a5713fbe0859889865b7174..70d2c7d0c5eda6cc748fac3c3f5b31bfd0c2152c 100644 (file)
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@@ -85,7 +85,7 @@
 /*====================*/
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    4               /* NS16550 register size */
+#define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1        0x01c20000      /* Base address of UART0 */
 #define CONFIG_SYS_NS16550_CLK         27000000        /* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX      1               /* use UART0 for console */