axp: Fix debugging support in DDR3 write leveling
authorPhil Sutter <phil@nwl.cc>
Fri, 25 Dec 2015 13:41:19 +0000 (14:41 +0100)
committerStefan Roese <sr@denx.de>
Thu, 14 Jan 2016 13:08:59 +0000 (14:08 +0100)
If MV_DEBUG_WL is defined, DEBUG_WL_S and DEBUG_WL_D macros are missing.
In addition to that, get rid of debug output printing non-existent
counter variable.

Signed-off-by: Phil Sutter <phil@nwl.cc>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
drivers/ddr/marvell/axp/ddr3_write_leveling.c

index df3a3df4a660852591348988eedae6b5f1d6911d..da384f321ca19aa8da3c1bfb606acad99d8ac9a2 100644 (file)
@@ -22,6 +22,8 @@
        DEBUG_WL_FULL_S(s); DEBUG_WL_FULL_D(d, l); DEBUG_WL_FULL_S("\n")
 
 #ifdef MV_DEBUG_WL
+#define DEBUG_WL_S(s)                  puts(s)
+#define DEBUG_WL_D(d, l)               printf("%x", d)
 #define DEBUG_RL_S(s) \
        debug_cond(ddr3_get_log_level() >= MV_LOG_LEVEL_2, "%s", s)
 #define DEBUG_RL_D(d, l) \
@@ -1229,8 +1231,6 @@ static int ddr3_write_leveling_single_cs(u32 cs, u32 freq, int ratio_2to1,
                        DEBUG_WL_FULL_D((u32) phase, 1);
                        DEBUG_WL_FULL_S(", Delay = ");
                        DEBUG_WL_FULL_D((u32) delay, 1);
-                       DEBUG_WL_FULL_S(", Counter = ");
-                       DEBUG_WL_FULL_D((u32) i, 1);
                        DEBUG_WL_FULL_S("\n");
 
                        /* Drive DQS high for one cycle - All data PUPs */