Enabled the Freescale SGMII riser card on 8572DS

This patch based on Andy's work.
Including command 'pixis_set_sgmii' support.

Signed-off-by: Liu Yu <yu.liu@freescale.com>

diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 74f1df2723a710eae1e4d9842c95989617f3990f..b2402dcc9fd59b1c73db1c8eb4936fbfd0ee731e 100644 (file)
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -33,8 +33,10 @@
 #include <miiphy.h>
 #include <libfdt.h>
 #include <fdt_support.h>
+#include <tsec.h>
 
 #include "../common/pixis.h"
+#include "../common/sgmii_riser.h"
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
@@ -519,6 +521,52 @@ unsigned long get_board_ddr_clk(ulong dummy)
 }
 #endif
 
+#ifdef CONFIG_TSEC_ENET
+int board_eth_init(bd_t *bis)
+{
+       struct tsec_info_struct tsec_info[4];
+       volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+       int num = 0;
+
+#ifdef CONFIG_TSEC1
+       SET_STD_TSEC_INFO(tsec_info[num], 1);
+       if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
+               tsec_info[num].flags |= TSEC_SGMII;
+       num++;
+#endif
+#ifdef CONFIG_TSEC2
+       SET_STD_TSEC_INFO(tsec_info[num], 2);
+       if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
+               tsec_info[num].flags |= TSEC_SGMII;
+       num++;
+#endif
+#ifdef CONFIG_TSEC3
+       SET_STD_TSEC_INFO(tsec_info[num], 3);
+       if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
+               tsec_info[num].flags |= TSEC_SGMII;
+       num++;
+#endif
+#ifdef CONFIG_TSEC4
+       SET_STD_TSEC_INFO(tsec_info[num], 4);
+       if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
+               tsec_info[num].flags |= TSEC_SGMII;
+       num++;
+#endif
+
+       if (!num) {
+               printf("No TSECs initialized\n");
+
+               return 0;
+       }
+
+       fsl_sgmii_riser_init(tsec_info, num);
+
+       tsec_eth_init(bis, tsec_info, num);
+
+       return 0;
+}
+#endif
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 void ft_board_setup(void *blob, bd_t *bd)
 {

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index c2606fa03c12a04fadad33e1b59e52ecdeec06d5..5688589960468060c53c8684116dcc76c785c8b6 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -239,6 +239,22 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define PIXIS_VCLKH            0x19    /* VELA VCLKH register */
 #define PIXIS_VCLKL            0x1A    /* VELA VCLKL register */
 #define CONFIG_SYS_PIXIS_VBOOT_MASK    0xc0
+#define PIXIS_VSPEED2_TSEC1SER 0x8
+#define PIXIS_VSPEED2_TSEC2SER 0x4
+#define PIXIS_VSPEED2_TSEC3SER 0x2
+#define PIXIS_VSPEED2_TSEC4SER 0x1
+#define PIXIS_VCFGEN1_TSEC1SER 0x20
+#define PIXIS_VCFGEN1_TSEC2SER 0x20
+#define PIXIS_VCFGEN1_TSEC3SER 0x20
+#define PIXIS_VCFGEN1_TSEC4SER 0x20
+#define PIXIS_VSPEED2_MASK     (PIXIS_VSPEED2_TSEC1SER \
+                                       | PIXIS_VSPEED2_TSEC2SER \
+                                       | PIXIS_VSPEED2_TSEC3SER \
+                                       | PIXIS_VSPEED2_TSEC4SER)
+#define PIXIS_VCFGEN1_MASK     (PIXIS_VCFGEN1_TSEC1SER \
+                                       | PIXIS_VCFGEN1_TSEC2SER \
+                                       | PIXIS_VCFGEN1_TSEC3SER \
+                                       | PIXIS_VCFGEN1_TSEC4SER)
 
 /* define to use L1 as initial stack */
 #define CONFIG_L1_INIT_RAM
@@ -418,6 +434,14 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_TSEC4   1
 #define CONFIG_TSEC4_NAME      "eTSEC4"
 
+#define CONFIG_PIXIS_SGMII_CMD
+#define CONFIG_FSL_SGMII_RISER 1
+#define SGMII_RISER_PHY_OFFSET 0x1c
+
+#ifdef CONFIG_FSL_SGMII_RISER
+#define CONFIG_SYS_TBIPA_VALUE         0x10 /* avoid conflict with eTSEC4 paddr */
+#endif
+
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
 #define TSEC3_PHY_ADDR         2