- compile mpddrc ram init code also for AT91SAM9M10G45
based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
in the cr configuration
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
#
obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
-obj-$(CONFIG_SPL_BUILD) += mpddrc.o spl.o
+ifneq ($(CONFIG_SPL_BUILD),)
+obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o
+obj-$(CONFIG_SAMA5D3) += mpddrc.o
+obj-y += spl.o
+endif
writel(0, ram_address);
}
+static int ddr2_decodtype_is_seq(u32 cr)
+{
+#if defined(CONFIG_SAMA5D3)
+ if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
+ return 0;
+#endif
+ return 1;
+}
+
int ddr2_init(const unsigned int ram_address,
const struct atmel_mpddr *mpddr_value)
{
/* Compute bank offset according to NC in configuration register */
ba_off = (mpddr_value->cr & ATMEL_MPDDRC_CR_NC_MASK) + 9;
- if (!(mpddr_value->cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED))
+ if (ddr2_decodtype_is_seq(mpddr_value->cr))
ba_off += ((mpddr_value->cr & ATMEL_MPDDRC_CR_NR_MASK) >> 2) + 11;
ba_off += (mpddr_value->md & ATMEL_MPDDRC_MD_DBW_MASK) ? 1 : 2;