Blackfin: spi: fix pin handling of SPI0 SSEL4

CS4 on SPI0 has a dedicated PH8 pin which needs to be enabled as a
peripheral in order to work.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/drivers/spi/bfin_spi.c b/drivers/spi/bfin_spi.c
index bc255ccc82d9f3d3335e64593993d67ef1a05675..2a72f99b2482ee278b3e5452830de3dd4e0f5d11 100644 (file)
--- a/drivers/spi/bfin_spi.c
+++ b/drivers/spi/bfin_spi.c
@@ -156,7 +156,7 @@ static void spi_portmux(struct spi_slave *slave)
                        case 1: SET_MUX(f, 2, 1); f_fer |= PF7;  break;
                        case 2: /* see G above */ g_fer |= PG15; break;
                        case 3: SET_MUX(h, 1, 3); f_fer |= PH4;  break;
-                       case 4: /* no muxing */                  break;
+                       case 4: /* no muxing */   h_fer |= PH8;  break;
                        case 5: SET_MUX(g, 1, 3); h_fer |= PG3;  break;
                        case 6: /* no muxing */                  break;
                        case 7: /* no muxing */                  break;