Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip
vendor code;
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
},
{
.ddrtiminga0 = {
- 0x80241d22,
+ 0x8010100d,
},
.ddrtimingb0 = {
- 0x15050f08,
+ 0x08020b04,
},
.ddrtimingc0 = {
0x00000602,
},
.devtodev0 = {
- 0x00002122,
+ 0x00002562,
},
.ddrmode = {
0x0000004c,
},
{
.ddrtiminga0 = {
- 0x80241d22,
+ 0x8010100d,
},
.ddrtimingb0 = {
- 0x15050f08,
+ 0x08020b04,
},
.ddrtimingc0 = {
0x00000602,
},
.devtodev0 = {
- 0x00002122,
+ 0x00002562,
},
.ddrmode = {
0x0000004c,
},
{
.ddrtiminga0 = {
- 0x80241d22,
+ 0x801c1819,
},
.ddrtimingb0 = {
- 0x15050f08,
+ 0x10040c05,
},
.ddrtimingc0 = {
0x00000602,
},
.devtodev0 = {
- 0x00002122,
+ 0x00002672,
},
.ddrmode = {
0x0000004c,