#define MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT 1
#define MAIN_DEVSTAT_PRIM_BOOTMODE_MMC_PORT_MASK BIT(6)
#define MAIN_DEVSTAT_PRIM_BOOTMODE_PORT_SHIFT 6
+#define MAIN_DEVSTAT_BKUP_MMC_PORT_MASK BIT(7)
+#define MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT 7
#define WKUP_CTRL_MMR0_BASE 0x43000000
#define MCU_CTRL_MMR0_BASE 0x40f00000
#define BOOT_DEVICE_MMC2_2 0x16
#define BOOT_DEVICE_RAM 0x17
+/* Backup boot modes with MCU Only = 0 */
+#define BACKUP_BOOT_DEVICE_RAM 0x0
+#define BACKUP_BOOT_DEVICE_USB 0x1
+#define BACKUP_BOOT_DEVICE_UART 0x3
+#define BACKUP_BOOT_DEVICE_ETHERNET 0x4
+#define BACKUP_BOOT_DEVICE_MMC2 0x5
+#define BACKUP_BOOT_DEVICE_SPI 0x6
+#define BACKUP_BOOT_DEVICE_I2C 0x7
+
#define BOOT_MODE_B_SHIFT 4
#define BOOT_MODE_B_MASK BIT(4)
+#define K3_PRIMARY_BOOTMODE 0x0
+#define K3_BACKUP_BOOTMODE 0x1
+
#endif
}
}
+static u32 __get_backup_bootmedia(u32 main_devstat)
+{
+ u32 bkup_boot = (main_devstat & MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >>
+ MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT;
+
+ switch (bkup_boot) {
+ case BACKUP_BOOT_DEVICE_USB:
+ return BOOT_DEVICE_DFU;
+ case BACKUP_BOOT_DEVICE_UART:
+ return BOOT_DEVICE_UART;
+ case BACKUP_BOOT_DEVICE_ETHERNET:
+ return BOOT_DEVICE_ETHERNET;
+ case BACKUP_BOOT_DEVICE_MMC2:
+ {
+ u32 port = (main_devstat & MAIN_DEVSTAT_BKUP_MMC_PORT_MASK) >>
+ MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT;
+ if (port == 0x0)
+ return BOOT_DEVICE_MMC1;
+ return BOOT_DEVICE_MMC2;
+ }
+ case BACKUP_BOOT_DEVICE_SPI:
+ return BOOT_DEVICE_SPI;
+ case BACKUP_BOOT_DEVICE_I2C:
+ return BOOT_DEVICE_I2C;
+ }
+
+ return BOOT_DEVICE_RAM;
+}
+
static u32 __get_primary_bootmedia(u32 main_devstat, u32 wkup_devstat)
{
/* MAIN CTRL MMR can only be read if MCU ONLY is 0 */
main_devstat = readl(CTRLMMR_MAIN_DEVSTAT);
- /* ToDo: Add support for backup boot media */
- return __get_primary_bootmedia(main_devstat, wkup_devstat);
+ if (bootindex == K3_PRIMARY_BOOTMODE)
+ return __get_primary_bootmedia(main_devstat, wkup_devstat);
+ else
+ return __get_backup_bootmedia(main_devstat);
}
#endif