@$(call define_add,CFG_AG7240_NMACS,2)
@$(MKCONFIG) -a db12x mips mips db12x ar7240 ar7240
+gl-inet_gl-ar750: qca953x_common
+ @$(call config_init,GL.iNet GL-AR750,gl-ar750,16,3,1,QCA_QCA9531_SOC)
+ @$(call define_add,CONFIG_FOR_GLINET_GL_AR750,1)
+ @$(call define_add,CFG_ATHRS27_PHY,1)
+ @$(call define_add,CFG_ATH_GMAC_NMACS,2)
+ @$(call define_add,CONFIG_PCI,1)
+ @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
+
gl-inet_gl-usb150: ar933x_common
@$(call config_init,GL.iNet GL-USB150,gl-usb150,16,11,,QCA_AR9331_SOC)
@$(call define_add,CONFIG_FOR_GLINET_GL_USB150,1)
#define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO11
+#elif defined(CONFIG_FOR_GLINET_GL_AR750)
+
+ #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO13 | GPIO14
+ #define CONFIG_QCA_GPIO_MASK_IN GPIO0 | GPIO16 | GPIO17
+ #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO2
+ #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO12
+
#elif defined(CONFIG_FOR_P2W_CPE505N)
#define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO4 | GPIO11 | GPIO12 |\
"rootfstype=jffs2 init=/sbin/init "\
"mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
+#elif defined(CONFIG_FOR_GLINET_GL_AR750)
+
+ #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
+ "rootfstype=squashfs init=/sbin/init "\
+ "mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),64k(art)ro,16000k(firmware)"
+
#elif defined(CONFIG_FOR_P2W_CPE505N) ||\
defined(CONFIG_FOR_P2W_R602N) ||\
defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
#define CFG_LOAD_ADDR 0x9F020000
+#elif defined(CONFIG_FOR_GLINET_GL_AR750)
+
+ #define CFG_LOAD_ADDR 0x9F060000
+
#elif defined(CONFIG_FOR_P2W_CPE505N) ||\
defined(CONFIG_FOR_P2W_R602N) ||\
defined(CONFIG_FOR_WALLYS_DR531) ||\
#define CFG_ENV_SIZE 0x7C00
#define CFG_ENV_SECT_SIZE 0x10000
+#elif defined(CONFIG_FOR_GLINET_GL_AR750)
+
+ #define CFG_ENV_ADDR 0x9F040000
+ #define CFG_ENV_SIZE 0x10000
+ #define CFG_ENV_SECT_SIZE 0x10000
+
#elif defined(CONFIG_FOR_P2W_CPE505N) ||\
defined(CONFIG_FOR_P2W_R602N) ||\
defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
#define OFFSET_MAC_DATA_BLOCK_LENGTH 0x10000
#define OFFSET_MAC_ADDRESS 0x00000
+#elif defined(CONFIG_FOR_GLINET_GL_AR750)
+
+ #define OFFSET_MAC_DATA_BLOCK 0x50000
+ #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x10000
+ #define OFFSET_MAC_ADDRESS 0x00000
+
#elif defined(CONFIG_FOR_P2W_CPE505N) ||\
defined(CONFIG_FOR_P2W_R602N) ||\
defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
#define WEBFAILSAFE_UPLOAD_ART_ADDRESS (CFG_FLASH_BASE + 0x10000)
+#elif defined(CONFIG_FOR_GLINET_GL_AR750)
+
+ #define WEBFAILSAFE_UPLOAD_ART_ADDRESS (CFG_FLASH_BASE + 0x50000)
+
#endif
/* Firmware size limit */
#define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (192 * 1024)
-#elif defined(CONFIG_FOR_P2W_CPE505N) ||\
- defined(CONFIG_FOR_P2W_R602N) ||\
- defined(CONFIG_FOR_WALLYS_DR531) ||\
- defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
- defined(CONFIG_FOR_YUNCORE_CPE830) ||\
+#elif defined(CONFIG_FOR_GLINET_GL_AR750) ||\
+ defined(CONFIG_FOR_P2W_CPE505N) ||\
+ defined(CONFIG_FOR_P2W_R602N) ||\
+ defined(CONFIG_FOR_WALLYS_DR531) ||\
+ defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
+ defined(CONFIG_FOR_YUNCORE_CPE830) ||\
defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (384 * 1024)
#define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x10000
#define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
+#elif defined(CONFIG_FOR_GLINET_GL_AR750)
+
+ #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x50000
+ #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
+
#elif defined(CONFIG_FOR_P2W_CPE505N) ||\
defined(CONFIG_FOR_P2W_R602N) ||\
defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
!defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\
!defined(CONFIG_FOR_COMFAST_CF_E520N) &&\
!defined(CONFIG_FOR_COMFAST_CF_E530N) &&\
+ !defined(CONFIG_FOR_GLINET_GL_AR750) &&\
!defined(CONFIG_FOR_P2W_CPE505N) &&\
!defined(CONFIG_FOR_P2W_R602N) &&\
!defined(CONFIG_FOR_WALLYS_DR531) &&\