net: rename "FSL UECx" net interfaces "UECx"
authorKim Phillips <kim.phillips@freescale.com>
Mon, 26 Jul 2010 23:34:57 +0000 (18:34 -0500)
committerBen Warren <biggerbadderben@gmail.com>
Mon, 9 Aug 2010 18:52:29 +0000 (11:52 -0700)
continuation of commit 2ecc2262d66a286e3aac79005bcb5f461312dea8
"net ppc: fix ethernet device names with spaces" (currently in
u-boot-net.git) for QE based parts.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
doc/README.kmeter1
drivers/qe/uec.c
drivers/qe/uec_phy.c
include/configs/MPC8323ERDB.h
include/configs/MPC832XEMDS.h
include/configs/MPC8360EMDS.h
include/configs/MPC8360ERDK.h
include/configs/MPC8568MDS.h
include/configs/MPC8569MDS.h
include/configs/kmeter1.h

index 44ebb7a781199f280a79ce63a389400d514f93cb..7f4fc999f8f4d31278b0787b176d273e0082591e 100644 (file)
@@ -51,7 +51,7 @@ Keymile kmeter1 Board
 
        tftp 10000 u-boot.bin
     => run load
-    Using FSL UEC0 device
+    Using UEC0 device
     TFTP from server 192.168.1.1; our IP address is 192.168.205.4
     Filename '/tftpboot/kmeter1/u-boot.bin'.
     Load address: 0x200000
index ccbf27d0be9cb400196845592a27ab2ac8306df7..3e92fe95a6e3446fcb90f833ff744bff139b438e 100644 (file)
@@ -1367,7 +1367,7 @@ int uec_initialize(bd_t *bis, uec_info_t *uec_info)
        uec->uec_info = uec_info;
        uec->dev = dev;
 
-       sprintf(dev->name, "FSL UEC%d", uec_info->uf_info.ucc_num);
+       sprintf(dev->name, "UEC%d", uec_info->uf_info.ucc_num);
        dev->iobase = 0;
        dev->priv = (void *)uec;
        dev->init = uec_init;
index 3baffe42fbcb37632cb80bb08c39cf44a965eb5e..2d3a896d6f3f9fe7abada120fe5cc162f7ffaf17 100644 (file)
@@ -71,8 +71,8 @@
  *                 {name, speed, duplex},
  *
  *     #define CONFIG_SYS_FIXED_PHY_PORTS \
- *                 CONFIG_SYS_FIXED_PHY_PORT("FSL UEC0",SPEED_100,DUPLEX_FULL) \
- *                 CONFIG_SYS_FIXED_PHY_PORT("FSL UEC2",SPEED_100,DUPLEX_HALF)
+ *                 CONFIG_SYS_FIXED_PHY_PORT("UEC0",SPEED_100,DUPLEX_FULL) \
+ *                 CONFIG_SYS_FIXED_PHY_PORT("UEC2",SPEED_100,DUPLEX_HALF)
  */
 
 #ifndef CONFIG_FIXED_PHY
@@ -102,7 +102,7 @@ static const struct fixed_phy_port fixed_phy_port[] = {
  * Example board header file to define bitbang ethernet ports:
  *
  * #define CONFIG_SYS_BITBANG_PHY_PORT(name) name,
- * #define CONFIG_SYS_BITBANG_PHY_PORTS CONFIG_SYS_BITBANG_PHY_PORT("FSL UEC0")
+ * #define CONFIG_SYS_BITBANG_PHY_PORTS CONFIG_SYS_BITBANG_PHY_PORT("UEC0")
 */
 #ifndef CONFIG_SYS_BITBANG_PHY_PORTS
 #define CONFIG_SYS_BITBANG_PHY_PORTS   /* default is an empty array */
index 7c843939c280fa44504bc30e3dfedd5ce2f2ac50..9a296a1e4add9541ff69c91a583965272e1d9021 100644 (file)
  * QE UEC ethernet configuration
  */
 #define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME                "FSL UEC0"
+#define CONFIG_ETHPRIME                "UEC0"
 
 #define CONFIG_UEC_ETH1                /* ETH3 */
 
index 7bd279369e4149c6dca158392e4604cdfda8f502..68ff191667e53fb0c022e942ab5167fe4a4a9bfd 100644 (file)
  * QE UEC ethernet configuration
  */
 #define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME                "FSL UEC0"
+#define CONFIG_ETHPRIME                "UEC0"
 
 #define CONFIG_UEC_ETH1                /* ETH3 */
 
index 87a137b3a33cca616b6b5f80219c200383e8f947..c58e0031ae7c110b38cebf2eabffcf39a147f983 100644 (file)
  * QE UEC ethernet configuration
  */
 #define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME                "FSL UEC0"
+#define CONFIG_ETHPRIME                "UEC0"
 #define CONFIG_PHY_MODE_NEED_CHANGE
 
 #define CONFIG_UEC_ETH1                /* GETH1 */
index e78cf60a109ffb9d08aa71831e2c1f9839288240..9fa577df9bc7f537a2d3abee545f0f1477c02f81 100644 (file)
  * QE UEC ethernet configuration
  */
 #define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME                "FSL UEC0"
+#define CONFIG_ETHPRIME                "UEC0"
 
 #define CONFIG_UEC_ETH1                /* GETH1 */
 
index ea7a134b8d52c7de6ad6cd8d128af5237c8a2726..2dc29325245b833fd53a7ff736ef9de7f5a11905 100644 (file)
@@ -313,7 +313,7 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_UEC_ETH
 #ifndef CONFIG_TSEC_ENET
-#define CONFIG_ETHPRIME         "FSL UEC0"
+#define CONFIG_ETHPRIME         "UEC0"
 #endif
 #define CONFIG_PHY_MODE_NEED_CHANGE
 #define CONFIG_eTSEC_MDIO_BUS
index f69b650185793618f445aebe65a1c8d9ad3b1b62..8177db371ad658ad92644732f322bb62910d0d85 100644 (file)
@@ -363,7 +363,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_MIIM_ADDRESS    (CONFIG_SYS_CCSRBAR + 0x82120)
 #define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME         "FSL UEC0"
+#define CONFIG_ETHPRIME         "UEC0"
 #define CONFIG_PHY_MODE_NEED_CHANGE
 
 #define CONFIG_UEC_ETH1         /* GETH1 */
index 64972317fba17f518a7e9724860a613ded4e1ada..f7d36b1ff2bc41397b467cf7d1579c0c2b649812 100644 (file)
  * QE UEC ethernet configuration
  */
 #define CONFIG_UEC_ETH
-#define CONFIG_ETHPRIME                "FSL UEC0"
+#define CONFIG_ETHPRIME                "UEC0"
 
 #define CONFIG_UEC_ETH1                /* GETH1 */
 #define UEC_VERBOSE_DEBUG      1