ppc4xx: Enable MPC92469AC on DLVision 10G
authorDirk Eibach <eibach@gdsys.de>
Wed, 6 Apr 2011 11:53:48 +0000 (13:53 +0200)
committerStefan Roese <sr@denx.de>
Thu, 21 Apr 2011 08:34:51 +0000 (10:34 +0200)
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
include/configs/dlvision-10g.h
include/gdsys_fpga.h

index 548b7ebd9496f16766e33358bcd8e59bbeb2b031..368aceb15c3e78e48b4cb2a56be187d7c11963a4 100644 (file)
  * OSD Setup
  */
 #define CONFIG_SYS_ICS8N3QV01
+#define CONFIG_SYS_MPC92469AC
 #define CONFIG_SYS_SIL1178
 #define CONFIG_SYS_OSD_SCREENS         CONFIG_SYS_FPGA_COUNT
 
index b02e28c8ee49ccc031c0defc1e0e2f07c0428b65..c0b1b5c3d74a6876ecd7da9da34677fcb554b09e 100644 (file)
@@ -97,11 +97,13 @@ typedef struct ihs_fpga {
        u16 extended_interrupt; /* 0x001c */
        u16 reserved_1[9];      /* 0x001e */
        ihs_i2c_t i2c;          /* 0x0030 */
-       u16 reserved_2[51];     /* 0x0038 */
+       u16 reserved_2[16];     /* 0x0038 */
+       u16 mpc3w_control;      /* 0x0058 */
+       u16 reserved_3[34];     /* 0x005a */
        u16 videocontrol;       /* 0x009e */
-       u16 reserved_3[176];    /* 0x00a0 */
+       u16 reserved_4[176];    /* 0x00a0 */
        ihs_osd_t osd;          /* 0x0200 */
-       u16 reserved_4[761];    /* 0x020e */
+       u16 reserved_5[761];    /* 0x020e */
        u16 videomem;           /* 0x0800 */
 } ihs_fpga_t;
 #endif