sun50i: h5: Add initial Orange Pi Zero Plus support
authorHauke Mehrtens <hauke@hauke-m.de>
Sat, 9 Jun 2018 16:34:46 +0000 (18:34 +0200)
committerJagan Teki <jagan@amarulasolutions.com>
Sat, 16 Jun 2018 09:22:42 +0000 (14:52 +0530)
Orange Pi Zero Plus is an open-source single-board computer
using the Allwinner H5 SOC.

H5 Orangepi Zero Plus has
 - Quad-core Cortex-A53
 - 512MB DDR3
 - micrSD slot
 - 16MBit SPI Nor flash
 - Debug TTL UART
 - 1GBit/s Ethernet (RTL8211E)
 - Wifi (RTL8189FTV)
 - USB 2.0 Host
 - USB 2.0 OTG + power supply

The device tree file is copied from the Linux kernel 4.17.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
arch/arm/dts/Makefile
arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts [new file with mode: 0644]
board/sunxi/MAINTAINERS
configs/orangepi_zero_plus_defconfig [new file with mode: 0644]

index 297160b3bd068c9938ae7db9b6f1eabda39c7f14..3da8fc7a189eab4282f96199b31e1bf0cc7bd142 100644 (file)
@@ -382,6 +382,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
        sun50i-h5-libretech-all-h3-cc.dtb \
        sun50i-h5-nanopi-neo2.dtb \
        sun50i-h5-nanopi-neo-plus2.dtb \
+       sun50i-h5-orangepi-zero-plus.dtb \
        sun50i-h5-orangepi-pc2.dtb \
        sun50i-h5-orangepi-prime.dtb \
        sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
new file mode 100644 (file)
index 0000000..e79cf3b
--- /dev/null
@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR X11)
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+       model = "Xunlong Orange Pi Zero Plus";
+       compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
+
+       reg_vcc3v3: vcc3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
+
+       aliases {
+               ethernet0 = &emac;
+               ethernet1 = &rtl8189ftv;
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pwr {
+                       label = "orangepi:green:pwr";
+                       gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+                       default-state = "on";
+               };
+
+               status {
+                       label = "orangepi:red:status";
+                       gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
+               };
+       };
+
+       reg_gmac_3v3: gmac-3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "gmac-3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               startup-delay-us = <100000>;
+               enable-active-high;
+               gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
+       };
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii";
+       status = "okay";
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};
+
+&mmc0 {
+       vmmc-supply = <&reg_vcc3v3>;
+       bus-width = <4>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       status = "okay";
+};
+
+&mmc1 {
+       vmmc-supply = <&reg_vcc3v3>;
+       bus-width = <4>;
+       non-removable;
+       status = "okay";
+
+       /*
+        * Explicitly define the sdio device, so that we can add an ethernet
+        * alias for it (which e.g. makes u-boot set a mac-address).
+        */
+       rtl8189ftv: sdio_wifi@1 {
+               reg = <1>;
+       };
+};
+
+/*
+&spi0  {
+       status = "okay";
+
+       flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "mxicy,mx25l1606e", "winbond,w25q128";
+               reg = <0>;
+               spi-max-frequency = <40000000>;
+       };
+};
+*/
+
+&ohci0 {
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins_a>;
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "peripheral";
+       status = "okay";
+};
+
+&usbphy {
+       /* USB Type-A ports' VBUS is always on */
+       usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+       status = "okay";
+};
index 6ebf612db3e90c2e2c6efc8af9e48f6c8e1f4f1c..db51f48ab60225c9bdb3a4633661cbc00cdbd672 100644 (file)
@@ -340,6 +340,11 @@ M: Icenowy Zheng <icenowy@aosc.xyz>
 S:     Maintained
 F:     configs/orangepi_zero_defconfig
 
+ORANGEPI ZERO PLUS BOARD
+M:     Hauke Mehrtens <hauke@hauke-m.de>
+S:     Maintained
+F:     configs/orangepi_zero_plus_defconfig
+
 ORANGEPI ZERO PLUS 2 BOARD
 M:     Jagan Teki <jagan@amarulasolutions.com>
 S:     Maintained
diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig
new file mode 100644 (file)
index 0000000..fc656ce
--- /dev/null
@@ -0,0 +1,16 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I_H5=y
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881977
+CONFIG_MMC0_CD_PIN="PH13"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y