rockchip: dts: rk3328: support and enable xhci

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 9920935b008dda1b0f3a32461f9b56cbeaa49787..b807bc5228dd25bff0ff681ea14236aec5cb12fa 100644 (file)
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -51,3 +51,8 @@
 &usb_host0_ohci {
        status = "okay";
 };
+
+&usb_host0_xhci {
+       rockchip,vbus-gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index e1219c3dc295e61087931a23d28b60c2fe344d38..f18cfc26279c1571dd03eb76c042df76618a82a4 100644 (file)
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -471,6 +471,17 @@
                status = "disabled";
        };
 
+       usb_host0_xhci: usb@ff600000 {
+               compatible = "rockchip,rk3328-xhci";
+               reg = <0x0 0xff600000 0x0 0x100000>;
+               interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+               snps,dis-enblslpm-quirk;
+               snps,phyif-utmi-bits = <16>;
+               snps,dis-u2-freeclk-exists-quirk;
+               snps,dis-u2-susphy-quirk;
+               status = "disabled";
+       };
+
        gic: interrupt-controller@ffb70000 {
                compatible = "arm,gic-400";
                #interrupt-cells = <3>;