arm: socfpga: Drop cyclone5 suffix from board file name

Drop the _cyclone5 suffix from socfpga_cyclone5.c since this file
will contain Arria 5 support as well.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>

diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile
index 44baa0068cc2d990ba384835d92f554fc8884555..c867f73ff7eac7f12f0e93437aa9e4272cf5472a 100644 (file)
--- a/board/altera/socfpga/Makefile
+++ b/board/altera/socfpga/Makefile
@@ -6,5 +6,5 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y  := socfpga_cyclone5.o
+obj-y  := socfpga.o
 obj-$(CONFIG_SPL_BUILD) += pinmux_config.o iocsr_config.o

diff --git a/board/altera/socfpga/socfpga.c b/board/altera/socfpga/socfpga.c
new file mode 100644 (file)
index 0000000..459d82f
--- /dev/null
+++ b/board/altera/socfpga/socfpga.c
@@ -0,0 +1,100 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/reset_manager.h>
+#include <asm/io.h>
+
+#include <usb.h>
+#include <usb/s3c_udc.h>
+#include <usb_mass_storage.h>
+
+#include <micrel.h>
+#include <netdev.h>
+#include <phy.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Print Board information
+ */
+int checkboard(void)
+{
+       puts("BOARD: Altera SoCFPGA Cyclone5 Board\n");
+       return 0;
+}
+
+/*
+ * Initialization function which happen at early stage of c code
+ */
+int board_early_init_f(void)
+{
+       return 0;
+}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+int board_init(void)
+{
+       /* Address of boot parameters for ATAG (if ATAG is used) */
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+       return 0;
+}
+
+/*
+ * PHY configuration
+ */
+#ifdef CONFIG_PHY_MICREL_KSZ9021
+int board_phy_config(struct phy_device *phydev)
+{
+       int ret;
+       /*
+        * These skew settings for the KSZ9021 ethernet phy is required for ethernet
+        * to work reliably on most flavors of cyclone5 boards.
+        */
+       ret = ksz9021_phy_extended_write(phydev,
+                                        MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
+                                        0x0);
+       if (ret)
+               return ret;
+
+       ret = ksz9021_phy_extended_write(phydev,
+                                        MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
+                                        0x0);
+       if (ret)
+               return ret;
+
+       ret = ksz9021_phy_extended_write(phydev,
+                                        MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
+                                        0xf0f0);
+       if (ret)
+               return ret;
+
+       if (phydev->drv->config)
+               return phydev->drv->config(phydev);
+
+       return 0;
+}
+#endif
+
+#ifdef CONFIG_USB_GADGET
+struct s3c_plat_otg_data socfpga_otg_data = {
+       .regs_otg       = CONFIG_USB_DWC2_REG_ADDR,
+       .usb_gusbcfg    = 0x1417,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+       return s3c_udc_probe(&socfpga_otg_data);
+}
+
+int g_dnl_board_usb_cable_connected(void)
+{
+       return 1;
+}
+#endif

diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c
deleted file mode 100644 (file)
index 459d82f..0000000
--- a/board/altera/socfpga/socfpga_cyclone5.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- *  Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/reset_manager.h>
-#include <asm/io.h>
-
-#include <usb.h>
-#include <usb/s3c_udc.h>
-#include <usb_mass_storage.h>
-
-#include <micrel.h>
-#include <netdev.h>
-#include <phy.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Print Board information
- */
-int checkboard(void)
-{
-       puts("BOARD: Altera SoCFPGA Cyclone5 Board\n");
-       return 0;
-}
-
-/*
- * Initialization function which happen at early stage of c code
- */
-int board_early_init_f(void)
-{
-       return 0;
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-int board_init(void)
-{
-       /* Address of boot parameters for ATAG (if ATAG is used) */
-       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-       return 0;
-}
-
-/*
- * PHY configuration
- */
-#ifdef CONFIG_PHY_MICREL_KSZ9021
-int board_phy_config(struct phy_device *phydev)
-{
-       int ret;
-       /*
-        * These skew settings for the KSZ9021 ethernet phy is required for ethernet
-        * to work reliably on most flavors of cyclone5 boards.
-        */
-       ret = ksz9021_phy_extended_write(phydev,
-                                        MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
-                                        0x0);
-       if (ret)
-               return ret;
-
-       ret = ksz9021_phy_extended_write(phydev,
-                                        MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
-                                        0x0);
-       if (ret)
-               return ret;
-
-       ret = ksz9021_phy_extended_write(phydev,
-                                        MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
-                                        0xf0f0);
-       if (ret)
-               return ret;
-
-       if (phydev->drv->config)
-               return phydev->drv->config(phydev);
-
-       return 0;
-}
-#endif
-
-#ifdef CONFIG_USB_GADGET
-struct s3c_plat_otg_data socfpga_otg_data = {
-       .regs_otg       = CONFIG_USB_DWC2_REG_ADDR,
-       .usb_gusbcfg    = 0x1417,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-       return s3c_udc_probe(&socfpga_otg_data);
-}
-
-int g_dnl_board_usb_cable_connected(void)
-{
-       return 1;
-}
-#endif