ARM: HYP/non-sec: Fix the ARCH Timer frequency setting.
authorXiubo Li <Li.Xiubo@freescale.com>
Fri, 21 Nov 2014 09:40:55 +0000 (17:40 +0800)
committerYork Sun <yorksun@freescale.com>
Thu, 11 Dec 2014 17:41:45 +0000 (09:41 -0800)
For some SoCs, the system clock frequency may not equal to the
ARCH Timer's frequency.

This patch uses the CONFIG_TIMER_CLK_FREQ instead of
CONFIG_SYS_CLK_FREQ, then the system clock macro and arch timer
macor could be set separately and without interfering each other.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv7/nonsec_virt.S
include/configs/sun7i.h

index 1ab5d54e307f3d53934e5d3fe2d57967ca1d9e3c..30d81db8b81b398905249b5fff4b0fc218fa6109 100644 (file)
@@ -169,11 +169,11 @@ ENTRY(_nonsec_init)
  * we do this here instead.
  * But first check if we have the generic timer.
  */
-#ifdef CONFIG_SYS_CLK_FREQ
+#ifdef CONFIG_TIMER_CLK_FREQ
        mrc     p15, 0, r0, c0, c1, 1           @ read ID_PFR1
        and     r0, r0, #CPUID_ARM_GENTIMER_MASK        @ mask arch timer bits
        cmp     r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
-       ldreq   r1, =CONFIG_SYS_CLK_FREQ
+       ldreq   r1, =CONFIG_TIMER_CLK_FREQ
        mcreq   p15, 0, r1, c14, c0, 0          @ write CNTFRQ
 #endif
 
index f6b1b3edc12f0cf2c5f2ffb676a3e121517571ef..4426d24e571af234fccd6443979544d72822dc36 100644 (file)
@@ -25,6 +25,7 @@
 #define CONFIG_ARMV7_PSCI              1
 #define CONFIG_ARMV7_SECURE_BASE       SUNXI_SRAM_B_BASE
 #define CONFIG_SYS_CLK_FREQ            24000000
+#define CONFIG_SYS_TIMER_CLK_FREQ      CONFIG_SYS_CLK_FREQ
 
 /*
  * Include common sunxi configuration where most the settings are