ARM: uniphier: rename UMC register macros of PH1-LD20
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Tue, 24 May 2016 12:14:00 +0000 (21:14 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Wed, 25 May 2016 15:36:58 +0000 (00:36 +0900)
Correct some register names.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/mach-uniphier/dram/umc-ld20.c
arch/arm/mach-uniphier/dram/umc64-regs.h

index 33cd48733be613123b5e51f5c9f49a0a79ae8773..186a398a6010eca517dac95895b8f2dd7196c3bb 100644 (file)
@@ -200,9 +200,9 @@ static int umc_dc_init(void __iomem *dc_base, enum dram_freq freq,
        writel(umc_dataset[freq], dc_base + UMC_DATASET);
 
        writel(0x00400020, dc_base + UMC_DCCGCTL);
-       writel(0x00000003, dc_base + UMC_ACSCTLA);
+       writel(0x00000003, dc_base + UMC_ACSSETA);
        writel(0x00000103, dc_base + UMC_FLOWCTLG);
-       writel(0x00010200, dc_base + UMC_ACSSETA);
+       writel(0x00010200, dc_base + UMC_ACSSETB);
 
        writel(umc_flowctla[freq], dc_base + UMC_FLOWCTLA);
        writel(0x00004444, dc_base + UMC_FLOWCTLC);
index 46e513cd0992ec5e3b0884b14f275edad9976f5d..1b6a838a4c110976dddf5041b095c8b8350da675 100644 (file)
@@ -23,8 +23,8 @@
 #define   UMC_SPCSETB_AREFMD_ARB       (0x0)   /* control by arbitor */
 #define   UMC_SPCSETB_AREFMD_CONT      (0x1)   /* control by DRAMCONT */
 #define   UMC_SPCSETB_AREFMD_REG       (0x2)   /* control by register */
-#define UMC_ACSCTLA            0x000000C0
-#define UMC_ACSSETA            0x000000C4
+#define UMC_ACSSETA            0x000000C0
+#define UMC_ACSSETB            0x000000C4
 #define UMC_MEMCONF0A          0x00000200
 #define UMC_MEMCONF0B          0x00000204
 #define UMC_MEMCONFCH          0x00000240