mx6: iomux: add GPR1 defines for use with nitrogen6x
authorTroy Kisky <troy.kisky@boundarydevices.com>
Thu, 26 Sep 2013 01:41:16 +0000 (18:41 -0700)
committerMarek Vasut <marex@denx.de>
Sun, 20 Oct 2013 21:42:40 +0000 (23:42 +0200)
Select GPIO1 as the USB OTG ID pin for Nitrogen6x

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
arch/arm/include/asm/arch-mx6/iomux.h
board/boundary/nitrogen6x/nitrogen6x.c

index ff13a1ea9f27752901d1362d83ca8c8a07fdf73a..fe4675e0b7fb6143715acdee78a9cb05e5183ebc 100644 (file)
@@ -9,6 +9,12 @@
 #define MX6_IOMUXC_GPR6                0x020e0018
 #define MX6_IOMUXC_GPR7                0x020e001c
 
+/*
+ * IOMUXC_GPR1 bit fields
+ */
+#define IOMUXC_GPR1_OTG_ID_ENET_RX_ERR (0<<13)
+#define IOMUXC_GPR1_OTG_ID_GPIO1       (1<<13)
+#define IOMUXC_GPR1_OTG_ID_MASK                (1<<13)
 /*
  * IOMUXC_GPR13 bit fields
  */
index 17129081b726cd891767b34c4627f99f1076756f..daa3fc8478e069268d76db9412938c79ba285d3d 100644 (file)
@@ -706,6 +706,13 @@ int overwrite_console(void)
 
 int board_init(void)
 {
+       struct iomuxc_base_regs *const iomuxc_regs
+               = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+
+       clrsetbits_le32(&iomuxc_regs->gpr[1],
+                       IOMUXC_GPR1_OTG_ID_MASK,
+                       IOMUXC_GPR1_OTG_ID_GPIO1);
+
        /* address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;