#define ZM_SOC_USB_MODE_CTRL_OFFSET 0x108
#define ZM_SOC_USB_MAX_AGGREGATE_OFFSET 0x110
#define ZM_SOC_USB_TIME_CTRL_OFFSET 0x114
+#define ZM_SOC_USB_DMA_RESET_OFFSET 0x118
#define ZM_ADDR_CONV 0x0
* *reg_data = 0x00000001;
* because of Hardware bug in K2
*/
- reg_data = (uint32_t *)(USB_CTRL_BASE_ADDRESS + 0x118);
- *reg_data = 0x00000000;
+ USB_WORD_REG_WRITE(ZM_SOC_USB_DMA_RESET_OFFSET, 0x0);
/* reset both usb(bit2)/wlan(bit1) dma */
HAL_WORD_REG_WRITE(MAGPIE_REG_RST_PWDN_CTRL_ADDR, (BIT2));
(HAL_WORD_REG_READ(MAGPIE_REG_RST_PWDN_CTRL_ADDR)|BIT0));
HAL_WORD_REG_WRITE(MAGPIE_REG_RST_PWDN_CTRL_ADDR, 0x0);
- *reg_data = 0x00000001;
+ USB_WORD_REG_WRITE(ZM_SOC_USB_DMA_RESET_OFFSET, BIT0);
/* MAC warem reset */
//reg_data = (uint32_t *)(K2_REG_MAC_BASE_ADDR + 0x7000);
A_DELAY_USECS(10);
- // reset usb DMA controller
- HAL_WORD_REG_WRITE((USB_CTRL_BASE_ADDRESS+0x118), 0x0);
+ /* reset usb DMA controller */
+ USB_WORD_REG_WRITE(ZM_SOC_USB_DMA_RESET_OFFSET, 0x0);
HAL_WORD_REG_WRITE(0x50010, (HAL_WORD_REG_READ(0x50010)|(BIT4)));
A_DELAY_USECS(5);
HAL_WORD_REG_WRITE(0x50010, (HAL_WORD_REG_READ(0x50010)&(~BIT4)));
-
- HAL_WORD_REG_WRITE((USB_CTRL_BASE_ADDRESS+0x118), 0x1);
+ USB_WORD_REG_WRITE(ZM_SOC_USB_DMA_RESET_OFFSET, BIT0);
}
static void _fw_power_off()
#define ZM_SOC_USB_MODE_CTRL_OFFSET 0x108
#define ZM_SOC_USB_MAX_AGGREGATE_OFFSET 0x110
#define ZM_SOC_USB_TIME_CTRL_OFFSET 0x114
+#define ZM_SOC_USB_DMA_RESET_OFFSET 0x118
#define ZM_ADDR_CONV 0x0
#if defined(_RAM_)
#include "athos_api.h"
-
+#include "usb_defs.h"
+
#if defined(PROJECT_MAGPIE)
#include "regdump.h"
-#include "usb_defs.h"
extern uint32_t *init_htc_handle;
uint8_t htc_complete_setup = 0;
void reset_EP4_FIFO(void);
HAL_WORD_REG_WRITE(MAGPIE_REG_AHB_ARB_ADDR,
(HAL_WORD_REG_READ(MAGPIE_REG_AHB_ARB_ADDR)|BIT1));
- HAL_WORD_REG_WRITE((USB_CTRL_BASE_ADDRESS+0x118), 0x0);
+ USB_WORD_REG_WRITE(ZM_SOC_USB_DMA_RESET_OFFSET, 0x0);
HAL_WORD_REG_WRITE(0x50010, HAL_WORD_REG_READ(0x50010)|BIT4);
A_DELAY_USECS(5);
HAL_WORD_REG_WRITE(0x50010, HAL_WORD_REG_READ(0x50010)&~BIT4);
A_DELAY_USECS(5);
- HAL_WORD_REG_WRITE((USB_CTRL_BASE_ADDRESS+0x118), 0x1);
+ USB_WORD_REG_WRITE(ZM_SOC_USB_DMA_RESET_OFFSET, BIT0);
// set clock to bypass mode - 40Mhz from XTAL
HAL_WORD_REG_WRITE(MAGPIE_REG_CPU_PLL_BYPASS_ADDR, (BIT0|BIT4));