};
typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+ typedef u32 (*usb_copy_func_t)(void);
+
+/*
+ * Set/clear program flow prediction and return the previous state.
+ */
+static int config_branch_prediction(int set_cr_z)
+{
+ unsigned int cr;
+
+ /* System Control Register: 11th bit Z Branch prediction enable */
+ cr = get_cr();
+ set_cr(set_cr_z ? cr | CR_Z : cr & ~CR_Z);
+
+ return cr & CR_Z;
+}
/*
* Copy U-boot from mmc to RAM:
void copy_uboot_to_ram(void)
{
spi_copy_func_t spi_copy;
- enum boot_mode bootmode;
+ usb_copy_func_t usb_copy;
+
+ int is_cr_z_set;
+ unsigned int sec_boot_check;
+ enum boot_mode bootmode = BOOT_MODE_OM;
u32 (*copy_bl2)(u32, u32, u32);
- bootmode = readl(EXYNOS5_POWER_BASE) & OM_STAT;
+ /* Read iRAM location to check for secondary USB boot mode */
+ sec_boot_check = readl(EXYNOS_IRAM_SECONDARY_BASE);
+ if (sec_boot_check == EXYNOS_USB_SECONDARY_BOOT)
+ bootmode = BOOT_MODE_USB;
+
+ if (bootmode == BOOT_MODE_OM)
+ bootmode = readl(EXYNOS5_POWER_BASE) & OM_STAT;
switch (bootmode) {
case BOOT_MODE_SERIAL:
copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT,
CONFIG_SYS_TEXT_BASE);
break;
+ case BOOT_MODE_USB:
+ /*
+ * iROM needs program flow prediction to be disabled
+ * before copy from USB device to RAM
+ */
+ is_cr_z_set = config_branch_prediction(0);
+ usb_copy = *(usb_copy_func_t *)
+ EXYNOS_COPY_USB_FNPTR_ADDR;
+ usb_copy();
+ config_branch_prediction(is_cr_z_set);
+ break;
default:
break;
}
#define CONFIG_USB_EHCI_EXYNOS
#define CONFIG_USB_STORAGE
+/* USB boot mode */
+#define EXYNOS_COPY_USB_FNPTR_ADDR 0x02020070
+#define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002
+#define EXYNOS_IRAM_SECONDARY_BASE 0x02020018
+
/* MMC SPL */
#define CONFIG_SPL
#define COPY_BL2_FNPTR_ADDR 0x02020030