select OF_BOARD_SETUP
select OF_CONTROL
select OF_SEPARATE
+ select SPECIFY_CONSOLE_INDEX
select SPL_STACK_R if SPL
select SPL_SYS_MALLOC_SIMPLE if SPL
select SYS_NS16550
select DM_SERIAL
select OF_CONTROL
select PL01X_SERIAL
+ select SPECIFY_CONSOLE_INDEX
help
Support for HiKey 96boards platform. It features a HI6220
SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
#define CONFIG_SYS_NS16550_CLK 100000000
#define CONFIG_SYS_NS16550_CLK_DIV 54
#define CONFIG_SERIAL_MULTI
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 0x18023000
/* Ethernet */
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK 0x03b9aca0
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1 0x18000300
#endif /* __ARCH_CONFIGS_H */
#define CONFIG_SYS_NS16550_CLK 13000000
#endif
-#if !defined(CONFIG_LPC32XX_HSUART)
-#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2)
-#else
-#define CONFIG_CONS_INDEX CONFIG_SYS_LPC32XX_UART
-#endif
-
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
config TI814X
bool "TI814X SoC"
+ select SPECIFY_CONSOLE_INDEX
help
Support for AM335x SOC from Texas Instruments.
The AM335x high performance SOC features a Cortex-A8
config TI816X
bool "TI816X SoC"
+ select SPECIFY_CONSOLE_INDEX
imply NAND_OMAP_ELM
imply NAND_OMAP_GPMC
help
config AM43XX
bool "AM43XX SoC"
+ select SPECIFY_CONSOLE_INDEX
imply NAND_OMAP_ELM
imply NAND_OMAP_GPMC
imply SPL_DM
config AM33XX
bool "AM33XX SoC"
+ select SPECIFY_CONSOLE_INDEX
imply NAND_OMAP_ELM
imply NAND_OMAP_GPMC
imply SPL_NAND_AM33XX_BCH
select ARM_CORTEX_CPU_IS_UP
select SUNXI_GEN_SUN4I
select SUPPORT_SPL
+ imply CONS_INDEX_2 if !DM_SERIAL
config MACH_SUN6I
bool "sun6i (Allwinner A31)"
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+ imply CONS_INDEX_5 if !DM_SERIAL
config MACH_SUN8I_A33
bool "sun8i (Allwinner A33)"
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+ imply CONS_INDEX_5 if !DM_SERIAL
config MACH_SUN8I_A83T
bool "sun8i (Allwinner A83T)"
config SYS_CONFIG_NAME
default "bav335x"
-config CONS_INDEX
- int "UART used for console"
- range 1 6
- default 1
- help
- The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
- in documentation, etc) available to it. Depending on your specific
- board you may want something other than UART0 as for example the IDK
- uses UART3 so enter 4 here.
-
config BAV_VERSION
int "BAV335x Version (1=A, 2=B)"
range 1 2
config SYS_CONFIG_NAME
default "pdu001"
-config CONS_INDEX
- int "UART used for console"
- range 1 6
- default 4
- help
- The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
- in documentation, etc) available to it. The best choice for the
- PDU001 is UART3 as it is wired to the header K2; enter 4 here to
- use UART3. UART0 is connected to the EIA-485 transceiver. If you
- really need to use it, you are advised to remove the transceiver U14
- from the board. UART1 is wired to the backplane and therefore
- accessible from there or by the backplane connector K1 of the PDU.
- Any other UART then UART3 (enter 4 here), UART1 (enter 2 here) or
- UART0 (enter 1 here) are not sensible since they are not wired to
- any connector and therefore difficult to access.
-
choice
prompt "State of Run LED"
default PDU001_RUN_LED_RED
config SYS_CONFIG_NAME
default "hikey"
-config CONS_INDEX
- int "UART used for console"
- range 1 4
- default 4
- help
- The hi6220 SoC has 5 UARTs. For example to use UART0 enter 1 here.
-
endif
config SYS_CONFIG_NAME
default "am335x_sl50"
-config CONS_INDEX
- int "UART used for console"
- range 1 6
- default 1
- help
- The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
- in documentation, etc) available to it. Depending on your specific
- board you may want something other than UART0 as for example the IDK
- uses UART3 so enter 4 here.
-
endif
config SYS_CONFIG_NAME
default "am335x_evm"
-config CONS_INDEX
- int "UART used for console"
- range 1 6
- default 1
- help
- The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
- in documentation, etc) available to it. Depending on your specific
- board you may want something other than UART0 as for example the IDK
- uses UART3 so enter 4 here.
-
config NOR
bool "Support for NOR flash"
help
config SYS_CONFIG_NAME
default "am57xx_evm"
-config CONS_INDEX
- int "UART used for console"
- range 1 6
- default 3
- help
- The AM57x (and DRA7xx) SoC has a total of 6 UARTs available to it.
- Depending on your specific board you may want something other than UART3
- here.
-
source "board/ti/common/Kconfig"
endif
config SYS_CONFIG_NAME
default "dra7xx_evm"
-config CONS_INDEX
- int "UART used for console"
- range 1 6
- default 1
- help
- The DRA7xx (and AM57x) SoC has a total of 6 UARTs available to it.
- Depending on your specific board you may want something other than UART1
- here.
-
source "board/ti/common/Kconfig"
endif
config SYS_CONFIG_NAME
default "baltos"
-config CONS_INDEX
- int "UART used for console"
- range 1 6
- default 1
- help
- The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
- in documentation, etc) available to it. Depending on your specific
- board you may want something other than UART0.
-
endif
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SUN4I_EMAC=y
CONFIG_AXP152_POWER=y
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SUNXI_NO_PMIC=y
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_DFU_RAM=y
CONFIG_AXP_ALDO3_VOLT=3300
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
-CONFIG_CONS_INDEX=1
CONFIG_MACH_SUN8I_A33=y
CONFIG_DRAM_CLK=432
CONFIG_DRAM_ZQ=15291
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP152_POWER=y
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP152_POWER=y
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
-CONFIG_CONS_INDEX=1
CONFIG_MACH_SUN8I_A33=y
CONFIG_DRAM_CLK=600
CONFIG_DRAM_ZQ=15291
# CONFIG_MMC is not set
CONFIG_AXP_ALDO3_VOLT=3300
CONFIG_AXP_ALDO4_VOLT=3300
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_NAND_SUNXI=y
CONFIG_AXP_ALDO3_VOLT=3300
CONFIG_AXP_ALDO4_VOLT=3300
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
# CONFIG_MMC is not set
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_AXP_ELDO2_VOLT=1800
+CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
-CONFIG_CONS_INDEX=1
CONFIG_MACH_SUN8I_A33=y
CONFIG_DRAM_CLK=552
CONFIG_DRAM_ZQ=15291
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_ALDO3_VOLT=3300
CONFIG_AXP_ALDO4_VOLT=3300
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_TPS65910=y
+CONFIG_CONS_INDEX=4
CONFIG_SYS_NS16550=y
# CONFIG_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HCD=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_MMC_MXS=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
+CONFIG_CONS_INDEX=0
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="u-boot> "
+CONFIG_CONS_INDEX=4
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CONS_INDEX=0
CONFIG_MXS_SPI=y
CONFIG_OF_LIBFDT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x2D000000
CONFIG_SMC911X_32_BIT=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x2C000000
CONFIG_SMC911X_32_BIT=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_SCSI_AHCI=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SCSI=y
+CONFIG_CONS_INDEX=4
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
CONFIG_TPM_AUTH_SESSIONS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
CONFIG_TPM_AUTH_SESSIONS=y
CONFIG_DOS_PARTITION=y
CONFIG_DM=y
# CONFIG_PCI is not set
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_TPM_AUTH_SESSIONS=y
CONFIG_TPM=y
CONFIG_DOS_PARTITION=y
CONFIG_DM=y
# CONFIG_PCI is not set
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_TPM_AUTH_SESSIONS=y
CONFIG_TPM=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
CONFIG_PHYLIB=y
-# CONFIG_SPL_DM_SERIAL is not set
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_PHY_MARVELL=y
CONFIG_NETDEVICES=y
CONFIG_FEC_MXC=y
-# CONFIG_SPL_DM_SERIAL is not set
CONFIG_MXC_UART=y
CONFIG_MXC_SPI=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_FEC_MXC=y
-# CONFIG_SPL_DM_SERIAL is not set
CONFIG_MXC_UART=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x2C000000
CONFIG_SMC911X_32_BIT=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_LED_STATUS_GREEN=0
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_CONS_INDEX=0
CONFIG_USB=y
CONFIG_USB_STORAGE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_CONS_INDEX=5
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
# CONFIG_MMC is not set
+CONFIG_CONS_INDEX=3
CONFIG_PXA_SERIAL=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_SYS_BOOTCOUNT_ADDR=0xfff3cf0c
# CONFIG_MMC is not set
CONFIG_SCSI=y
+CONFIG_CONS_INDEX=0
CONFIG_OF_LIBFDT=y
CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
CONFIG_MMC_DW=y
CONFIG_MMC_DW_K3=y
+CONFIG_CONS_INDEX=4
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_DLDO1_VOLT=3300
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x2C000000
CONFIG_SMC911X_32_BIT=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x2C000000
CONFIG_SMC911X_32_BIT=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_CMD_NFS is not set
CONFIG_SYS_OMAP24_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SCSI=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CONS_INDEX=0
CONFIG_MXS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP152_POWER=y
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_LED_STATUS_CMD=y
CONFIG_MMC_MXS=y
+CONFIG_CONS_INDEX=0
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_ENV_IS_IN_MMC=y
# CONFIG_NET is not set
CONFIG_MMC_MXS=y
+CONFIG_CONS_INDEX=0
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_CONS_INDEX=0
CONFIG_MXS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_CONS_INDEX=0
CONFIG_MXS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_CONS_INDEX=0
CONFIG_MXS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_CONS_INDEX=0
CONFIG_MXS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_CMD_FAT=y
# CONFIG_NET is not set
CONFIG_MMC_OMAP_HS=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_SPL_NAND_SIMPLE=y
-CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x08000000
CONFIG_SMC911X_32_BIT=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_OMAP3_SPI=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x2C000000
CONFIG_SMC911X_32_BIT=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_MMC_OMAP_HS=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_CMD_TCA642X=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SCSI=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_CONS_INDEX=5
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_AXP152_POWER=y
+CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MMC_MXS=y
+CONFIG_CONS_INDEX=0
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_GADGET=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_MXS=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=0
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
# CONFIG_CMD_NFS is not set
CONFIG_SYS_OMAP24_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_CONS_INDEX=5
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_BCH=y
CONFIG_PANIC_HANG=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_BCH=y
CONFIG_PANIC_HANG=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_MXS=y
+CONFIG_CONS_INDEX=0
CONFIG_OF_LIBFDT=y
CONFIG_SMC911X_BASE=0x1a000000
CONFIG_SMC911X_32_BIT=y
CONFIG_BAUDRATE=38400
+CONFIG_CONS_INDEX=0
CONFIG_OF_LIBFDT=y
CONFIG_SMC911X_BASE=0x1a000000
CONFIG_SMC911X_32_BIT=y
CONFIG_BAUDRATE=38400
+CONFIG_CONS_INDEX=0
CONFIG_OF_LIBFDT=y
CONFIG_SMC911X_BASE=0x4e000000
CONFIG_SMC911X_32_BIT=y
CONFIG_BAUDRATE=38400
+CONFIG_CONS_INDEX=0
CONFIG_OF_LIBFDT=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_CONS_INDEX=0
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MMC_MXS=y
+CONFIG_CONS_INDEX=0
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_GADGET=y
CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_CONS_INDEX=2
CONFIG_PXA_SERIAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
during serial port initialization (default y). Set this to n on
boards which have no debug serial port whatsoever.
+config SPECIFY_CONSOLE_INDEX
+ bool "Specify the port number used for console"
+ default y if !DM_SERIAL || (SPL && !SPL_DM_SERIAL) || \
+ (TPL && !TPL_DM_SERIAL)
+ help
+ In various cases, we need to specify which of the UART devices that
+ a board or SoC has available are to be used for the console device
+ in U-Boot.
+
config SERIAL_PRESENT
bool "Provide a serial driver"
depends on DM_SERIAL
This option enables the full UART in SPL, so if is it disabled,
the full UART driver will be omitted, thus saving space.
+# Logic to allow us to use the imply keyword to set what the default port
+# should be. The default is otherwise 1.
+config CONS_INDEX_0
+ bool
+
+config CONS_INDEX_2
+ bool
+
+config CONS_INDEX_3
+ bool
+
+config CONS_INDEX_4
+ bool
+
+config CONS_INDEX_5
+ bool
+
+config CONS_INDEX_6
+ bool
+
config CONS_INDEX
int "UART used for console"
- depends on ARCH_SUNXI
- default 2 if MACH_SUN5I
- default 5 if MACH_SUN8I_A23 || MACH_SUN8I_A33
+ depends on SPECIFY_CONSOLE_INDEX
+ range 0 6
+ default 0 if CONS_INDEX_0
+ default 2 if CONS_INDEX_2
+ default 3 if CONS_INDEX_3
+ default 4 if CONS_INDEX_4
+ default 5 if CONS_INDEX_5
+ default 6 if CONS_INDEX_6
default 1
help
- Configures the console index.
- For Allwinner SoC., default values are 2 for SUN5I and 5 for A23/A33.
- Otherwise, the index equals 1.
+ Set this to match the UART number of the serial console.
config DM_SERIAL
bool "Enable Driver Model for serial drivers"
config SPL_DM_SERIAL
bool "Enable Driver Model for serial drivers in SPL"
- depends on DM_SERIAL
- default y if SPL && DM_SERIAL
+ depends on DM_SERIAL && SPL_DM
+ default y
help
Enable driver model for serial in SPL. This replaces
drivers/serial/serial.c with the serial uclass, which
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc*/
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc*/
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#endif
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 2)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 2
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 2
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 2
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/* Serial Port */
#define CONFIG_CONS_ON_SCC /* define if console on SCC */
#undef CONFIG_CONS_NONE /* define if console on something else */
-#define CONFIG_CONS_INDEX 1 /* which serial channel for console */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#endif
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
*/
/* FTUART is a high speed NS 16C550A compatible UART, addr: 0x99600000 */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_02_BASE
#ifndef CONFIG_DM_SERIAL
*/
/* FTUART is a high speed NS 16C550A compatible UART, addr: 0x99600000 */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_02_BASE
#ifndef CONFIG_DM_SERIAL
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
#define CONFIG_LOADADDR 0x12000000
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
-#define CONFIG_CONS_INDEX 1
/* Ethernet support */
#define CONFIG_PHY_SMSC
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
-#define CONFIG_CONS_INDEX 1
/* PMIC support */
#define CONFIG_POWER_TPS65217
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3 /* UART3 on CRANEBOARD */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Command definition */
#undef CONFIG_CMD_LOADB
* Serial Driver
*/
#define CONFIG_MXC_UART
-#define CONFIG_CONS_INDEX 1
#define CONFIG_MXC_UART_BASE UART1_BASE
/*
/* Post pad 3 bytes after each reg addr */
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK 13000000
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1 0x3e000000
/* must fit into GPT:u-boot-env partition */
/* Post pad 3 bytes after each reg addr */
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK 13000000
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1 0x3e000000
/* must fit into GPT:u-boot-env partition */
#define CONFIG_SYS_NS16550_COM2 0x66110000
#define CONFIG_SYS_NS16550_COM3 0x66120000
#define CONFIG_SYS_NS16550_COM4 0x66130000
-#define CONFIG_CONS_INDEX 4
#define CONFIG_BAUDRATE 115200
#define CONFIG_ENV_SIZE SZ_8K
#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
#include <configs/ti_am335x_common.h>
-#define CONFIG_CONS_INDEX 1
-
#ifndef CONFIG_SPL_BUILD
# define CONFIG_TIMESTAMP
#endif
#define CONSOLEDEV "ttyO2"
#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_OMAP_ABE_SYSCK
#define CONFIG_SYS_AUTOLOAD "no"
/* Serial console configuration */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SERIAL1 1 /* UART0 */
/* NS16550 Configuration */
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3 /* UART3 */
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3 /* UART3 */
"run emmcboot; " \
"fi;"
-#define CONFIG_CONS_INDEX 1
-
/* SPL defines. */
#define CONFIG_SPL_TEXT_BASE 0x40300350
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20))
#define OMAP_HSMMC_USE_GPIO
/* UART setup */
-#define CONFIG_CONS_INDEX 4
#define CONFIG_SYS_NS16550_COM4 UART4_BASE
/* MMC ENV related defines */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Command definition */
#undef CONFIG_CMD_LOADB
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 2
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
#endif
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_SPI
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
/* UART */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
-#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
/* USB Configs */
#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART0_BASE /* Base address of UART0 */
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_SPI
#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
#include "tam3517-common.h"
/* Our console port is port3 */
-#undef CONFIG_CONS_INDEX
#undef CONFIG_SYS_NS16550_COM1
#undef CONFIG_SERIAL1
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
/* Serial port hardware configuration */
-#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, \
115200, 230400}
#define CONFIG_SYS_SERIAL0 0x808C0000
* for your console driver.
*/
-#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/*
* Command definition
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
#define CONFIG_LOADADDR 0x12000000
* Serial port
*/
#define CONFIG_FFUART
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 }
#define CONFIG_PL011_CLOCK 150000000
#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) }
-#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 2
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
*/
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
/*
* Flash & Environment
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/***********************************************************
* Command definition
#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
-#define CONFIG_CONS_INDEX 0
-
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART0_BASE /* Base address of UART0 */
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
/*
* Flash & Environment
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK 48000000
#define CONFIG_SYS_NS16550_COM3 UART3_BASE
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
115200 }
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
* for your console driver.
*/
-#define CONFIG_CONS_INDEX 1 /* Console on UART0 */
-
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART1_BASE /* Base address of UART1 */
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_SPI
#define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#ifdef CONFIG_LPUART
#define CONFIG_LPUART_32B_REG
#else
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#ifndef CONFIG_DM_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#ifdef CONFIG_LPUART
#define CONFIG_LPUART_32B_REG
#else
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#ifndef CONFIG_DM_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
#include "ls2080a_common.h"
-#undef CONFIG_CONS_INDEX
-#define CONFIG_CONS_INDEX 2
-
#ifdef CONFIG_FSL_QSPI
#ifdef CONFIG_TARGET_LS2081ARDB
#define CONFIG_QIXIS_I2C_ACCESS
*/
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONFIG_CONS_INDEX 1
/*
* MMC Driver
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3 /* UART3 */
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
* for your console driver.
*/
-#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
115200,230400, 460800, 921600 }
/* auto boot */
/* Serial Info */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
/* No NOR flash present */
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/*
* Command definition
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
#define CONFIG_ETHPRIME "FEC0"
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Command definition */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Command definition */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Command definition */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Command definition */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
/* Command definition */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Command definition */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Filesystems and image support */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 512
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_CACHELINE_SIZE 64
*/
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
-#define CONFIG_CONS_INDEX 0
/* Default baudrate can be overridden by board! */
/* FEC Ethernet on SoC */
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */
/*
* Serial console configuration
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#ifndef CONFIG_DM_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_MISC_INIT_R
/* Serial setup */
-#define CONFIG_CONS_INDEX 0
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-odroidc2.dtb\0"
* are needed and peripheral clocks for UART2 must be enabled in
* function per_clocks_enable().
*/
-#undef CONFIG_CONS_INDEX
-#define CONFIG_CONS_INDEX 2
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_SYS_NS16550_COM3
#define CONFIG_SYS_NS16550_COM2 OMAP34XX_UART2
#define CONFIG_REVISION_TAG
/* Override OMAP3 serial console configuration */
-#undef CONFIG_CONS_INDEX
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
/* NAND */
#ifdef CONFIG_SPL_BUILD
/* select serial console configuration for SPL */
-#undef CONFIG_CONS_INDEX
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
#endif
#include <configs/ti_omap5_common.h>
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 UART3_BASE
#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SPI
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_MISC_INIT_R
/* Serial setup */
-#define CONFIG_CONS_INDEX 0
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-p212.dtb\0"
#define CONFIG_SF_DEFAULT_SPEED 24000000
-#define CONFIG_CONS_INDEX 1
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define __CONFIG_PENGWYN_H
#define CONFIG_SERIAL1
-#define CONFIG_CONS_INDEX 1
#include <configs/ti_am335x_common.h>
"fi;" \
/* Serial console configuration */
-#define CONFIG_CONS_INDEX 1 /* UART0 */
#define CONFIG_SERIAL1 1
#define CONFIG_SYS_NS16550_COM1 0x44e09000
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK 115200
#define CONFIG_SYS_NS16550_COM1 0xb40003f8
-#define CONFIG_CONS_INDEX 1
#ifdef CONFIG_SYS_BIG_ENDIAN
#define CONFIG_IDE_SWAP_IO
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK 115200
#define CONFIG_SYS_NS16550_COM1 0xffffffffb40003f8
-#define CONFIG_CONS_INDEX 1
#ifdef CONFIG_SYS_BIG_ENDIAN
#define CONFIG_IDE_SWAP_IO
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (400000000 / CONFIG_SYS_CLK_DIV)
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_NS16550_COM4 0x481a6000
#define CONFIG_SERIAL1 1
-#define CONFIG_CONS_INDEX 1
/* I2C Configuration */
#define CONFIG_I2C
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
115200 }
#define CONFIG_SYS_NS16550_COM1 SOCFPGA_UART1_ADDRESS
#define CONFIG_SYS_NS16550_CLK 50000000
#endif
-#define CONFIG_CONS_INDEX 1
/*
* USB
/* Serial Port */
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
* CONFIG_PL01x_PORTS is defined in specific files
*/
#define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
-#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
57600, 115200 }
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 2
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
* open - index 2
* shorted - index 1
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
#define CONFIG_SERIAL1 /* UART1 */
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
/* allow to overwrite serial and ethaddr */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */
-#define CONFIG_CONS_INDEX 1
-
/* Filesystems / image support */
/* MMC */
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 1
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
/* PL011 Serial Configuration */
#define CONFIG_PL011_CLOCK 24000000
-#define CONFIG_CONS_INDEX 1
/* Generic Interrupt Controller Definitions */
#define GICD_BASE (0x801000000000)
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/* Defines for SPL */
#define CONFIG_SPL_TEXT_BASE 0x40300000
#define CONFIG_SERIAL1
#define CONFIG_SERIAL2
#define CONFIG_SERIAL3
-#define CONFIG_CONS_INDEX 1
/*
* GPMC NAND block. We support 1 device and the physical address to
#endif
#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
-#define CONFIG_CONS_INDEX 1
#ifndef CONFIG_SOC_K2G
#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(KS2_CLK1_6)
115200}
/* Select serial console configuration */
-#define CONFIG_CONS_INDEX 3
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_COM3 UART3_BASE
#endif
-#define CONFIG_CONS_INDEX 3
/* TWL6030 */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
/* select serial console configuration */
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */
-#define CONFIG_CONS_INDEX 1 /* use UART0 : used by serial driver */
/***********************************************************
* Command definition
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-#define CONFIG_CONS_INDEX 1
-
#define CONFIG_ENV_OFFSET 0x100000
#define CONFIG_ENV_SIZE 0x2000
/* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
/* UART */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
-#define CONFIG_CONS_INDEX 1
/* SD/MMC */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_COM1 UART_1_BASE
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_CLK 921600
/*
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#endif
/* PL011 Serial Configuration */
-#define CONFIG_CONS_INDEX 0
#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
#define CONFIG_PL011_CLOCK 7273800
#else
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
(void *)CONFIG_SYS_SERIAL1}
-#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SYS_SERIAL0 V2M_UART0
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX 1
/*
* Command definition
#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \
(void *)CONFIG_SYS_SERIAL1 }
#define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
-#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
57600, 115200 }
#define CONFIG_SYS_LOADS_BAUD_CHANGE
#define CONFIG_ARM_DCC
#define CONFIG_CPU_ARMV8
-#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 4800, 9600, 19200, 38400, 57600, 115200 }
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/*
* Serial Port
*/
-#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
/* Input clk to NS16550 (in Hz; the SYS_CLK_FREQ is in kHz) */
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_CLK_FREQ
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*======================*/
* STUART - the lower serial port on Colibri board
*/
#define CONFIG_STUART 1
-#define CONFIG_CONS_INDEX 2
/*
* Bootloader Components Configuration
*/
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONFIG_CONS_INDEX 1 /* use UART2 for console */
/*
* Ethernet